Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 3 | * |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 4 | * Copyright (C) 2007-2008 coresystems GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
Uwe Hermann | 2d2f0c1 | 2009-10-28 17:36:11 +0000 | [diff] [blame] | 8 | * published by the Free Software Foundation; version 2 of the License. |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
Arthur Heymans | c583920 | 2019-11-12 23:48:42 +0100 | [diff] [blame^] | 16 | #include <bootblock_common.h> |
Edward O'Callaghan | cf5ac3d | 2014-06-03 08:40:34 +1000 | [diff] [blame] | 17 | #include <superio/smsc/lpc47m15x/lpc47m15x.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 18 | #include <northbridge/intel/i945/i945.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 19 | #include <southbridge/intel/i82801gx/i82801gx.h> |
Patrick Georgi | d083595 | 2010-10-05 09:07:10 +0000 | [diff] [blame] | 20 | |
Edward O'Callaghan | cf5ac3d | 2014-06-03 08:40:34 +1000 | [diff] [blame] | 21 | #define SERIAL_DEV PNP_DEV(0x2e, LPC47M15X_SP1) |
| 22 | #define PME_DEV PNP_DEV(0x2e, LPC47M15X_PME) |
Uwe Hermann | 57b2ff8 | 2010-11-21 17:29:59 +0000 | [diff] [blame] | 23 | |
Arthur Heymans | dc584c3 | 2019-11-12 20:37:21 +0100 | [diff] [blame] | 24 | void mainboard_late_rcba_config(void) |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 25 | { |
| 26 | /* Set up virtual channel 0 */ |
| 27 | //RCBA32(0x0014) = 0x80000001; |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 28 | |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 29 | /* dev irq route register */ |
Arthur Heymans | b451df2 | 2017-08-15 20:59:09 +0200 | [diff] [blame] | 30 | RCBA16(D31IR) = 0x0132; |
| 31 | RCBA16(D30IR) = 0x0146; |
| 32 | RCBA16(D29IR) = 0x0237; |
| 33 | RCBA16(D28IR) = 0x3201; |
| 34 | RCBA16(D27IR) = 0x0146; |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 35 | |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 36 | /* Disable unused devices */ |
Arthur Heymans | 6267f5d | 2018-12-15 23:46:48 +0100 | [diff] [blame] | 37 | RCBA32(FD) |= FD_INTLAN; |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 38 | |
| 39 | /* Enable PCIe Root Port Clock Gate */ |
| 40 | // RCBA32(0x341c) = 0x00000001; |
| 41 | } |
| 42 | |
Arthur Heymans | c583920 | 2019-11-12 23:48:42 +0100 | [diff] [blame^] | 43 | void bootblock_mainboard_early_init(void) |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 44 | { |
Edward O'Callaghan | cf5ac3d | 2014-06-03 08:40:34 +1000 | [diff] [blame] | 45 | /* Enable SuperIO PM */ |
| 46 | lpc47m15x_enable_serial(PME_DEV, 0x680); |
| 47 | lpc47m15x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); /* 0x3f8 */ |
Stefan Reinauer | 1a08f58 | 2009-10-28 16:52:48 +0000 | [diff] [blame] | 48 | } |