Stefan Reinauer | e1ae4b2 | 2012-04-27 23:20:58 +0200 | [diff] [blame] | 1 | chip northbridge/intel/sandybridge |
| 2 | |
| 3 | # Enable DisplayPort 1 Hotplug with 6ms pulse |
| 4 | register "gpu_dp_d_hotplug" = "0x06" |
| 5 | |
| 6 | # Enable DisplayPort 0 Hotplug with 6ms pulse |
| 7 | register "gpu_dp_c_hotplug" = "0x06" |
| 8 | |
| 9 | # Enable DVI Hotplug with 6ms pulse |
| 10 | register "gpu_dp_b_hotplug" = "0x06" |
| 11 | |
Vladimir Serbinenko | d2990c9 | 2016-02-10 02:52:42 +0100 | [diff] [blame] | 12 | register "max_mem_clock_mhz" = "666" |
| 13 | |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 14 | device cpu_cluster 0 on |
Stefan Reinauer | e1ae4b2 | 2012-04-27 23:20:58 +0200 | [diff] [blame] | 15 | chip cpu/intel/model_206ax |
| 16 | # Magic APIC ID to locate this chip |
Angel Pons | c56c723 | 2021-05-17 11:03:55 +0200 | [diff] [blame^] | 17 | device lapic 0 on end |
Arthur Heymans | b3f2323 | 2019-01-21 17:48:55 +0100 | [diff] [blame] | 18 | device lapic 0xacac off end |
Stefan Reinauer | e1ae4b2 | 2012-04-27 23:20:58 +0200 | [diff] [blame] | 19 | |
Angel Pons | 6f56a23 | 2021-01-04 17:02:23 +0100 | [diff] [blame] | 20 | register "acpi_c1" = "3" # ACPI(C1) = MWAIT(C3) |
| 21 | register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C6) |
| 22 | register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7) |
Stefan Reinauer | e1ae4b2 | 2012-04-27 23:20:58 +0200 | [diff] [blame] | 23 | end |
| 24 | end |
| 25 | |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 26 | device domain 0 on |
Stefan Reinauer | 56c7dc7 | 2012-05-15 12:36:57 -0700 | [diff] [blame] | 27 | subsystemid 0x1ae0 0xc000 inherit |
Stefan Reinauer | e1ae4b2 | 2012-04-27 23:20:58 +0200 | [diff] [blame] | 28 | device pci 00.0 on end # host bridge |
| 29 | device pci 02.0 on end # vga controller |
| 30 | |
| 31 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
Stefan Reinauer | e1ae4b2 | 2012-04-27 23:20:58 +0200 | [diff] [blame] | 32 | # GPI routing |
| 33 | # 0 No effect (default) |
| 34 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 35 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
| 36 | register "gpi1_routing" = "0" |
| 37 | register "gpi14_routing" = "2" |
| 38 | |
Stefan Reinauer | e1ae4b2 | 2012-04-27 23:20:58 +0200 | [diff] [blame] | 39 | register "sata_port_map" = "0x3" |
| 40 | |
Vladimir Serbinenko | 5b044ae | 2014-10-25 15:20:55 +0200 | [diff] [blame] | 41 | register "c2_latency" = "1" |
Vladimir Serbinenko | 5b044ae | 2014-10-25 15:20:55 +0200 | [diff] [blame] | 42 | |
Arthur Heymans | 6beaef9 | 2019-06-16 23:29:23 +0200 | [diff] [blame] | 43 | register "gen1_dec" = "0x00fc1601" |
Stefan Reinauer | e1ae4b2 | 2012-04-27 23:20:58 +0200 | [diff] [blame] | 44 | # SuperIO range is 0x700-0x73f |
| 45 | register "gen2_dec" = "0x003c0701" |
| 46 | |
| 47 | device pci 16.0 on end # Management Engine Interface 1 |
| 48 | device pci 16.1 off end # Management Engine Interface 2 |
| 49 | device pci 16.2 off end # Management Engine IDE-R |
| 50 | device pci 16.3 off end # Management Engine KT |
| 51 | device pci 19.0 off end # Intel Gigabit Ethernet |
| 52 | device pci 1a.0 on end # USB2 EHCI #2 |
| 53 | device pci 1b.0 on end # High Definition Audio |
| 54 | device pci 1c.0 on end # PCIe Port #1 (WLAN) |
| 55 | device pci 1c.1 off end # PCIe Port #2 |
| 56 | device pci 1c.2 on end # PCIe Port #3 (Debug) |
| 57 | device pci 1c.3 on end # PCIe Port #4 (LAN) |
| 58 | device pci 1c.4 off end # PCIe Port #5 |
| 59 | device pci 1c.5 off end # PCIe Port #6 |
| 60 | device pci 1c.6 off end # PCIe Port #7 |
| 61 | device pci 1c.7 off end # PCIe Port #8 |
| 62 | device pci 1d.0 on end # USB2 EHCI #1 |
| 63 | device pci 1e.0 off end # PCI bridge |
| 64 | device pci 1f.0 on # LPC bridge |
| 65 | chip superio/ite/it8772f |
| 66 | # Enable GPIO10 as USBPWRON12# |
| 67 | # Enable GPIO12 as USBPWRON13# |
| 68 | register "gpio_set1" = "0x05" |
| 69 | # Enable GPIO22 as SIO_WAEKSCI# |
| 70 | register "gpio_set2" = "0x04" |
| 71 | # Enable GPIO32 as SIO_EXTSMI# |
| 72 | register "gpio_set3" = "0x04" |
| 73 | # Enable GPIO45 as LED_POWER# |
| 74 | register "gpio_set4" = "0x20" |
| 75 | # Enable GPIO51 as USBPWRON8# |
| 76 | # Enable GPIO52 as USBPWRON1# |
| 77 | register "gpio_set5" = "0x06" |
| 78 | # Skip keyboard init |
| 79 | register "skip_keyboard" = "1" |
| 80 | # Enable PECI on TMPIN3 |
| 81 | register "peci_tmpin" = "3" |
| 82 | # Enable FAN3 |
| 83 | register "fan3_enable" = "1" |
| 84 | |
| 85 | device pnp 2e.0 off end # FDC |
| 86 | device pnp 2e.1 on # Serial Port 1 |
| 87 | io 0x60 = 0x2f8 |
| 88 | irq 0x70 = 4 |
| 89 | end |
| 90 | device pnp 2e.4 on # Environment Controller |
| 91 | io 0x60 = 0x700 |
| 92 | io 0x62 = 0x710 |
| 93 | end |
| 94 | device pnp 2e.7 on # GPIO |
| 95 | io 0x60 = 0x720 |
| 96 | io 0x62 = 0x730 |
| 97 | end |
| 98 | device pnp 2e.5 on |
| 99 | io 0x60 = 0x60 |
| 100 | io 0x62 = 0x64 |
| 101 | irq 0x70 = 1 |
| 102 | end # Keyboard |
| 103 | device pnp 2e.6 on |
| 104 | irq 0x70 = 12 |
| 105 | end # Mouse |
| 106 | device pnp 2e.a off end # IR |
| 107 | end |
Matt DeVillier | 3044af7 | 2018-08-01 13:05:14 -0500 | [diff] [blame] | 108 | chip drivers/pc80/tpm |
| 109 | device pnp 0c31.0 on end |
| 110 | end |
Stefan Reinauer | e1ae4b2 | 2012-04-27 23:20:58 +0200 | [diff] [blame] | 111 | end |
| 112 | device pci 1f.2 on end # SATA Controller 1 |
| 113 | device pci 1f.3 on end # SMBus |
| 114 | device pci 1f.5 off end # SATA Controller 2 |
| 115 | device pci 1f.6 on end # Thermal |
| 116 | end |
| 117 | end |
| 118 | end |