Angel Pons | c3f58f6 | 2020-04-05 15:46:41 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Aaron Durbin | 3bde3d7 | 2013-11-04 21:45:52 -0600 | [diff] [blame] | 3 | |
| 4 | // Intel LPC Bus Device - 0:1f.0 |
| 5 | |
| 6 | Device (LPCB) |
| 7 | { |
| 8 | Name(_ADR, 0x001f0000) |
| 9 | |
| 10 | #include "irqlinks.asl" |
| 11 | |
| 12 | #include "acpi/ec.asl" |
| 13 | |
| 14 | Device (DMAC) // DMA Controller |
| 15 | { |
| 16 | Name(_HID, EISAID("PNP0200")) |
| 17 | Name(_CRS, ResourceTemplate() |
| 18 | { |
| 19 | IO (Decode16, 0x00, 0x00, 0x01, 0x20) |
| 20 | IO (Decode16, 0x81, 0x81, 0x01, 0x11) |
| 21 | IO (Decode16, 0x93, 0x93, 0x01, 0x0d) |
| 22 | IO (Decode16, 0xc0, 0xc0, 0x01, 0x20) |
| 23 | DMA (Compatibility, NotBusMaster, Transfer8_16) { 4 } |
| 24 | }) |
| 25 | } |
| 26 | |
| 27 | Device (FWH) // Firmware Hub |
| 28 | { |
| 29 | Name (_HID, EISAID("INT0800")) |
| 30 | Name (_CRS, ResourceTemplate() |
| 31 | { |
| 32 | Memory32Fixed(ReadOnly, 0xff000000, 0x01000000) |
| 33 | }) |
| 34 | } |
| 35 | |
| 36 | Device (HPET) |
| 37 | { |
| 38 | Name (_HID, EISAID("PNP0103")) |
| 39 | Name (_CID, 0x010CD041) |
| 40 | |
| 41 | Method (_STA, 0) // Device Status |
| 42 | { |
| 43 | Return (0xf) // Enable and show device |
| 44 | } |
| 45 | |
| 46 | Name(_CRS, ResourceTemplate() |
| 47 | { |
Elyes HAOUAS | 1644e48 | 2019-10-30 11:28:42 +0100 | [diff] [blame] | 48 | Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400) |
Aaron Durbin | 3bde3d7 | 2013-11-04 21:45:52 -0600 | [diff] [blame] | 49 | }) |
| 50 | } |
| 51 | |
| 52 | Device(PIC) // 8259 Interrupt Controller |
| 53 | { |
| 54 | Name(_HID,EISAID("PNP0000")) |
| 55 | Name(_CRS, ResourceTemplate() |
| 56 | { |
| 57 | IO (Decode16, 0x20, 0x20, 0x01, 0x02) |
| 58 | IO (Decode16, 0x24, 0x24, 0x01, 0x02) |
| 59 | IO (Decode16, 0x28, 0x28, 0x01, 0x02) |
| 60 | IO (Decode16, 0x2c, 0x2c, 0x01, 0x02) |
| 61 | IO (Decode16, 0x30, 0x30, 0x01, 0x02) |
| 62 | IO (Decode16, 0x34, 0x34, 0x01, 0x02) |
| 63 | IO (Decode16, 0x38, 0x38, 0x01, 0x02) |
| 64 | IO (Decode16, 0x3c, 0x3c, 0x01, 0x02) |
| 65 | IO (Decode16, 0xa0, 0xa0, 0x01, 0x02) |
| 66 | IO (Decode16, 0xa4, 0xa4, 0x01, 0x02) |
| 67 | IO (Decode16, 0xa8, 0xa8, 0x01, 0x02) |
| 68 | IO (Decode16, 0xac, 0xac, 0x01, 0x02) |
| 69 | IO (Decode16, 0xb0, 0xb0, 0x01, 0x02) |
| 70 | IO (Decode16, 0xb4, 0xb4, 0x01, 0x02) |
| 71 | IO (Decode16, 0xb8, 0xb8, 0x01, 0x02) |
| 72 | IO (Decode16, 0xbc, 0xbc, 0x01, 0x02) |
| 73 | IO (Decode16, 0x4d0, 0x4d0, 0x01, 0x02) |
| 74 | IRQNoFlags () { 2 } |
| 75 | }) |
| 76 | } |
| 77 | |
| 78 | Device(LDRC) // LPC device: Resource consumption |
| 79 | { |
| 80 | Name (_HID, EISAID("PNP0C02")) |
| 81 | Name (_UID, 2) |
| 82 | |
| 83 | Name (RBUF, ResourceTemplate() |
| 84 | { |
| 85 | IO (Decode16, 0x61, 0x61, 0x1, 0x01) // NMI Status |
| 86 | IO (Decode16, 0x63, 0x63, 0x1, 0x01) // CPU Reserved |
| 87 | IO (Decode16, 0x65, 0x65, 0x1, 0x01) // CPU Reserved |
| 88 | IO (Decode16, 0x67, 0x67, 0x1, 0x01) // CPU Reserved |
| 89 | IO (Decode16, 0x80, 0x80, 0x1, 0x01) // Port 80 Post |
| 90 | IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved |
| 91 | IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI |
| 92 | }) |
| 93 | |
| 94 | Method (_CRS, 0, NotSerialized) |
| 95 | { |
| 96 | Return (RBUF) |
| 97 | } |
| 98 | } |
| 99 | |
| 100 | Device (RTC) // Real Time Clock |
| 101 | { |
| 102 | Name (_HID, EISAID("PNP0B00")) |
| 103 | Name (_CRS, ResourceTemplate() |
| 104 | { |
| 105 | IO (Decode16, 0x70, 0x70, 1, 8) |
| 106 | // Disable as Windows doesn't like it, and systems don't seem to use it. |
| 107 | // IRQNoFlags() { 8 } |
| 108 | }) |
| 109 | } |
| 110 | |
| 111 | Device (TIMR) // Intel 8254 timer |
| 112 | { |
| 113 | Name(_HID, EISAID("PNP0100")) |
| 114 | Name(_CRS, ResourceTemplate() |
| 115 | { |
| 116 | IO (Decode16, 0x40, 0x40, 0x01, 0x04) |
| 117 | IO (Decode16, 0x50, 0x50, 0x10, 0x04) |
| 118 | IRQNoFlags() {0} |
| 119 | }) |
| 120 | } |
| 121 | |
Aaron Durbin | ab7ed054 | 2013-11-07 14:33:21 -0600 | [diff] [blame] | 122 | // Include mainboard's superio.asl file. |
| 123 | #include "acpi/superio.asl" |
Aaron Durbin | 3bde3d7 | 2013-11-04 21:45:52 -0600 | [diff] [blame] | 124 | } |