Aaron Durbin | 3bde3d7 | 2013-11-04 21:45:52 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * Copyright (C) 2013 Google Inc. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; version 2 of |
| 10 | * the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, |
| 20 | * MA 02110-1301 USA |
| 21 | */ |
| 22 | |
| 23 | // Intel LPC Bus Device - 0:1f.0 |
| 24 | |
| 25 | Device (LPCB) |
| 26 | { |
| 27 | Name(_ADR, 0x001f0000) |
| 28 | |
| 29 | #include "irqlinks.asl" |
| 30 | |
| 31 | #include "acpi/ec.asl" |
| 32 | |
| 33 | Device (DMAC) // DMA Controller |
| 34 | { |
| 35 | Name(_HID, EISAID("PNP0200")) |
| 36 | Name(_CRS, ResourceTemplate() |
| 37 | { |
| 38 | IO (Decode16, 0x00, 0x00, 0x01, 0x20) |
| 39 | IO (Decode16, 0x81, 0x81, 0x01, 0x11) |
| 40 | IO (Decode16, 0x93, 0x93, 0x01, 0x0d) |
| 41 | IO (Decode16, 0xc0, 0xc0, 0x01, 0x20) |
| 42 | DMA (Compatibility, NotBusMaster, Transfer8_16) { 4 } |
| 43 | }) |
| 44 | } |
| 45 | |
| 46 | Device (FWH) // Firmware Hub |
| 47 | { |
| 48 | Name (_HID, EISAID("INT0800")) |
| 49 | Name (_CRS, ResourceTemplate() |
| 50 | { |
| 51 | Memory32Fixed(ReadOnly, 0xff000000, 0x01000000) |
| 52 | }) |
| 53 | } |
| 54 | |
| 55 | Device (HPET) |
| 56 | { |
| 57 | Name (_HID, EISAID("PNP0103")) |
| 58 | Name (_CID, 0x010CD041) |
| 59 | |
| 60 | Method (_STA, 0) // Device Status |
| 61 | { |
| 62 | Return (0xf) // Enable and show device |
| 63 | } |
| 64 | |
| 65 | Name(_CRS, ResourceTemplate() |
| 66 | { |
| 67 | Memory32Fixed(ReadOnly, 0xfed00000, 0x400) |
| 68 | }) |
| 69 | } |
| 70 | |
| 71 | Device(PIC) // 8259 Interrupt Controller |
| 72 | { |
| 73 | Name(_HID,EISAID("PNP0000")) |
| 74 | Name(_CRS, ResourceTemplate() |
| 75 | { |
| 76 | IO (Decode16, 0x20, 0x20, 0x01, 0x02) |
| 77 | IO (Decode16, 0x24, 0x24, 0x01, 0x02) |
| 78 | IO (Decode16, 0x28, 0x28, 0x01, 0x02) |
| 79 | IO (Decode16, 0x2c, 0x2c, 0x01, 0x02) |
| 80 | IO (Decode16, 0x30, 0x30, 0x01, 0x02) |
| 81 | IO (Decode16, 0x34, 0x34, 0x01, 0x02) |
| 82 | IO (Decode16, 0x38, 0x38, 0x01, 0x02) |
| 83 | IO (Decode16, 0x3c, 0x3c, 0x01, 0x02) |
| 84 | IO (Decode16, 0xa0, 0xa0, 0x01, 0x02) |
| 85 | IO (Decode16, 0xa4, 0xa4, 0x01, 0x02) |
| 86 | IO (Decode16, 0xa8, 0xa8, 0x01, 0x02) |
| 87 | IO (Decode16, 0xac, 0xac, 0x01, 0x02) |
| 88 | IO (Decode16, 0xb0, 0xb0, 0x01, 0x02) |
| 89 | IO (Decode16, 0xb4, 0xb4, 0x01, 0x02) |
| 90 | IO (Decode16, 0xb8, 0xb8, 0x01, 0x02) |
| 91 | IO (Decode16, 0xbc, 0xbc, 0x01, 0x02) |
| 92 | IO (Decode16, 0x4d0, 0x4d0, 0x01, 0x02) |
| 93 | IRQNoFlags () { 2 } |
| 94 | }) |
| 95 | } |
| 96 | |
| 97 | Device(LDRC) // LPC device: Resource consumption |
| 98 | { |
| 99 | Name (_HID, EISAID("PNP0C02")) |
| 100 | Name (_UID, 2) |
| 101 | |
| 102 | Name (RBUF, ResourceTemplate() |
| 103 | { |
| 104 | IO (Decode16, 0x61, 0x61, 0x1, 0x01) // NMI Status |
| 105 | IO (Decode16, 0x63, 0x63, 0x1, 0x01) // CPU Reserved |
| 106 | IO (Decode16, 0x65, 0x65, 0x1, 0x01) // CPU Reserved |
| 107 | IO (Decode16, 0x67, 0x67, 0x1, 0x01) // CPU Reserved |
| 108 | IO (Decode16, 0x80, 0x80, 0x1, 0x01) // Port 80 Post |
| 109 | IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved |
| 110 | IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI |
| 111 | }) |
| 112 | |
| 113 | Method (_CRS, 0, NotSerialized) |
| 114 | { |
| 115 | Return (RBUF) |
| 116 | } |
| 117 | } |
| 118 | |
| 119 | Device (RTC) // Real Time Clock |
| 120 | { |
| 121 | Name (_HID, EISAID("PNP0B00")) |
| 122 | Name (_CRS, ResourceTemplate() |
| 123 | { |
| 124 | IO (Decode16, 0x70, 0x70, 1, 8) |
| 125 | // Disable as Windows doesn't like it, and systems don't seem to use it. |
| 126 | // IRQNoFlags() { 8 } |
| 127 | }) |
| 128 | } |
| 129 | |
| 130 | Device (TIMR) // Intel 8254 timer |
| 131 | { |
| 132 | Name(_HID, EISAID("PNP0100")) |
| 133 | Name(_CRS, ResourceTemplate() |
| 134 | { |
| 135 | IO (Decode16, 0x40, 0x40, 0x01, 0x04) |
| 136 | IO (Decode16, 0x50, 0x50, 0x10, 0x04) |
| 137 | IRQNoFlags() {0} |
| 138 | }) |
| 139 | } |
| 140 | |
| 141 | #ifdef ENABLE_TPM |
| 142 | Device (TPM) // Trusted Platform Module |
| 143 | { |
| 144 | Name(_HID, EISAID("IFX0102")) |
| 145 | Name(_CID, 0x310cd041) |
| 146 | Name(_UID, 1) |
| 147 | |
| 148 | Method(_STA, 0) |
| 149 | { |
| 150 | If (TPMP) { |
| 151 | Return (0xf) |
| 152 | } |
| 153 | Return (0x0) |
| 154 | } |
| 155 | |
| 156 | Name(_CRS, ResourceTemplate() { |
| 157 | IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) |
| 158 | IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) |
| 159 | Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) |
| 160 | IRQ (Edge, Activehigh, Exclusive) { 6 } |
| 161 | }) |
| 162 | } |
| 163 | #endif |
| 164 | } |