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Patrick Georgiac959032020-05-05 22:49:26 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Nitheesh Sekar20e75872018-09-14 11:24:10 +05302
Nitheesh Sekar717050d2018-09-16 16:16:42 +05303#include <symbols.h>
Nitheesh Sekar20e75872018-09-14 11:24:10 +05304#include <device/device.h>
Nitheesh Sekar717050d2018-09-16 16:16:42 +05305#include <soc/mmu.h>
6#include <soc/symbols.h>
Nitheesh Sekar20e75872018-09-14 11:24:10 +05307
8static void soc_read_resources(struct device *dev)
9{
Kyösti Mälkkif35c0742021-06-26 14:12:54 +030010 ram_range(dev, 0, (uintptr_t)_dram, 1 * GiB);
11 reserved_ram_range(dev, 1, (uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved));
Nitheesh Sekar20e75872018-09-14 11:24:10 +053012}
13
14static void soc_init(struct device *dev)
15{
16
17}
18
19static struct device_operations soc_ops = {
20 .read_resources = soc_read_resources,
21 .init = soc_init,
22};
23
24static void enable_soc_dev(struct device *dev)
25{
26 dev->ops = &soc_ops;
27}
28
29struct chip_operations soc_qualcomm_qcs405_ops = {
Nicholas Sudsgaardbfb11be2024-01-30 09:53:46 +090030 .name = "SOC Qualcomm QCS405",
Nitheesh Sekar20e75872018-09-14 11:24:10 +053031 .enable_dev = enable_soc_dev,
32};