Angel Pons | 8a3453f | 2020-04-02 23:48:19 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | 4885daa | 2011-04-26 23:47:04 +0000 | [diff] [blame] | 2 | |
| 3 | #include <stdint.h> |
Kyösti Mälkki | 2b95da0 | 2014-02-15 10:19:23 +0200 | [diff] [blame] | 4 | #include <stddef.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 5 | #include <device/pci_ops.h> |
Kyösti Mälkki | 1d7541f | 2014-02-17 21:34:42 +0200 | [diff] [blame] | 6 | #include <console/uart.h> |
Kyösti Mälkki | bbf6f3d | 2014-03-15 01:32:55 +0200 | [diff] [blame] | 7 | #include <device/pci.h> |
Nicholas Chin | 0de34dc | 2023-04-20 13:23:07 -0600 | [diff] [blame] | 8 | #include "uart8250reg.h" |
Stefan Reinauer | 4885daa | 2011-04-26 23:47:04 +0000 | [diff] [blame] | 9 | |
Nicholas Chin | 0de34dc | 2023-04-20 13:23:07 -0600 | [diff] [blame] | 10 | static int oxpcie_present; |
Aaron Durbin | e4d7abc | 2017-04-16 22:05:36 -0500 | [diff] [blame] | 11 | static DEVTREE_CONST u32 uart0_base = CONFIG_EARLY_PCI_MMIO_BASE + 0x1000; |
Kyösti Mälkki | 2b95da0 | 2014-02-15 10:19:23 +0200 | [diff] [blame] | 12 | |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 13 | int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base) |
Stefan Reinauer | 4885daa | 2011-04-26 23:47:04 +0000 | [diff] [blame] | 14 | { |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 15 | pci_devfn_t device = PCI_DEV(bus, dev, 0); |
Stefan Reinauer | 4885daa | 2011-04-26 23:47:04 +0000 | [diff] [blame] | 16 | |
Kyösti Mälkki | e088721 | 2019-09-26 22:33:51 +0300 | [diff] [blame] | 17 | u32 id = pci_s_read_config32(device, PCI_VENDOR_ID); |
Stefan Reinauer | a6087d1 | 2011-05-09 15:19:29 -0700 | [diff] [blame] | 18 | switch (id) { |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 19 | case 0xc1181415: /* e.g. Startech PEX1S1PMINI function 0 */ |
Stefan Reinauer | a6087d1 | 2011-05-09 15:19:29 -0700 | [diff] [blame] | 20 | /* On this device function 0 is the parallel port, and |
| 21 | * function 3 is the serial port. So let's go look for |
| 22 | * the UART. |
| 23 | */ |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 24 | device = PCI_DEV(bus, dev, 3); |
Kyösti Mälkki | e088721 | 2019-09-26 22:33:51 +0300 | [diff] [blame] | 25 | id = pci_s_read_config32(device, PCI_VENDOR_ID); |
Stefan Reinauer | a6087d1 | 2011-05-09 15:19:29 -0700 | [diff] [blame] | 26 | if (id != 0xc11b1415) |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 27 | return -1; |
Stefan Reinauer | a6087d1 | 2011-05-09 15:19:29 -0700 | [diff] [blame] | 28 | break; |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 29 | case 0xc11b1415: /* e.g. Startech PEX1S1PMINI function 3 */ |
Stefan Reinauer | a6087d1 | 2011-05-09 15:19:29 -0700 | [diff] [blame] | 30 | case 0xc1581415: /* e.g. Startech MPEX2S952 */ |
Stefan Reinauer | a6087d1 | 2011-05-09 15:19:29 -0700 | [diff] [blame] | 31 | break; |
Gabe Black | 4d04a71 | 2011-10-05 01:52:08 -0700 | [diff] [blame] | 32 | default: |
| 33 | /* No UART here. */ |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 34 | return -1; |
Stefan Reinauer | a6087d1 | 2011-05-09 15:19:29 -0700 | [diff] [blame] | 35 | } |
| 36 | |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 37 | /* Sanity-check, we assume fixed location. */ |
| 38 | if (mmio_base != CONFIG_EARLY_PCI_MMIO_BASE) |
| 39 | return -1; |
| 40 | |
Stefan Reinauer | 4885daa | 2011-04-26 23:47:04 +0000 | [diff] [blame] | 41 | /* Setup base address on device */ |
Kyösti Mälkki | e088721 | 2019-09-26 22:33:51 +0300 | [diff] [blame] | 42 | pci_s_write_config32(device, PCI_BASE_ADDRESS_0, mmio_base); |
Stefan Reinauer | 4885daa | 2011-04-26 23:47:04 +0000 | [diff] [blame] | 43 | |
| 44 | /* Enable memory on device */ |
Kyösti Mälkki | e088721 | 2019-09-26 22:33:51 +0300 | [diff] [blame] | 45 | u16 reg16 = pci_s_read_config16(device, PCI_COMMAND); |
Stefan Reinauer | 4885daa | 2011-04-26 23:47:04 +0000 | [diff] [blame] | 46 | reg16 |= PCI_COMMAND_MEMORY; |
Kyösti Mälkki | e088721 | 2019-09-26 22:33:51 +0300 | [diff] [blame] | 47 | pci_s_write_config16(device, PCI_COMMAND, reg16); |
Stefan Reinauer | 4885daa | 2011-04-26 23:47:04 +0000 | [diff] [blame] | 48 | |
Arthur Heymans | 5fadb46 | 2019-11-20 21:28:15 +0100 | [diff] [blame] | 49 | oxpcie_present = 1; |
Kyösti Mälkki | 4c686f2 | 2014-02-14 12:45:09 +0200 | [diff] [blame] | 50 | return 0; |
Stefan Reinauer | 4885daa | 2011-04-26 23:47:04 +0000 | [diff] [blame] | 51 | } |
| 52 | |
Nicholas Chin | 0de34dc | 2023-04-20 13:23:07 -0600 | [diff] [blame] | 53 | /* |
| 54 | * Stages that do not call pci_early_device_probe() identify an |
| 55 | * enabled UART with a test read. Since PCI bus enumeration |
| 56 | * has not happened PCI configuration register access is not |
| 57 | * possible here. |
| 58 | */ |
| 59 | static int uart_presence(uintptr_t base) |
Kyösti Mälkki | 2b95da0 | 2014-02-15 10:19:23 +0200 | [diff] [blame] | 60 | { |
Nicholas Chin | 0de34dc | 2023-04-20 13:23:07 -0600 | [diff] [blame] | 61 | /* LCR has no side-effects on reads. */ |
| 62 | const u8 reg = UART8250_LCR; |
| 63 | u8 val; |
| 64 | |
| 65 | if (CONFIG(DRIVERS_UART_8250MEM_32)) |
| 66 | val = read32p(base + 4 * reg) & 0xff; |
| 67 | else |
| 68 | val = read8p(base + reg); |
| 69 | |
| 70 | if (val == 0xff) |
| 71 | return -1; |
| 72 | |
| 73 | /* Something decoded MMIO read, assume it was the UART. */ |
| 74 | return 1; |
| 75 | } |
| 76 | |
| 77 | static bool oxpcie_uart_active(void) |
| 78 | { |
| 79 | if (oxpcie_present == 0) |
| 80 | oxpcie_present = uart_presence(uart0_base); |
| 81 | |
| 82 | if (oxpcie_present > 0) |
| 83 | return true; |
| 84 | if (oxpcie_present < 0) |
| 85 | return false; |
| 86 | |
| 87 | /* not reached */ |
| 88 | return false; |
Kyösti Mälkki | 2b95da0 | 2014-02-15 10:19:23 +0200 | [diff] [blame] | 89 | } |
| 90 | |
Felix Held | e3a1247 | 2020-09-11 15:47:09 +0200 | [diff] [blame] | 91 | uintptr_t uart_platform_base(unsigned int idx) |
Kyösti Mälkki | 2b95da0 | 2014-02-15 10:19:23 +0200 | [diff] [blame] | 92 | { |
Felix Held | e3a1247 | 2020-09-11 15:47:09 +0200 | [diff] [blame] | 93 | if ((idx < 8) && oxpcie_uart_active()) |
Kyösti Mälkki | e993ec7 | 2015-03-20 08:51:57 +0200 | [diff] [blame] | 94 | return uart0_base + idx * 0x200; |
Kyösti Mälkki | 2b95da0 | 2014-02-15 10:19:23 +0200 | [diff] [blame] | 95 | return 0; |
| 96 | } |
| 97 | |
Kyösti Mälkki | 2b95da0 | 2014-02-15 10:19:23 +0200 | [diff] [blame] | 98 | void oxford_remap(u32 new_base) |
| 99 | { |
Kyösti Mälkki | fb25f9f | 2018-12-26 20:15:58 +0200 | [diff] [blame] | 100 | #if ENV_RAMSTAGE |
Kyösti Mälkki | 2b95da0 | 2014-02-15 10:19:23 +0200 | [diff] [blame] | 101 | uart0_base = new_base + 0x1000; |
Gabe Black | 4d04a71 | 2011-10-05 01:52:08 -0700 | [diff] [blame] | 102 | #endif |
Kyösti Mälkki | fb25f9f | 2018-12-26 20:15:58 +0200 | [diff] [blame] | 103 | } |
Kyösti Mälkki | 3ee1668 | 2014-02-17 19:37:52 +0200 | [diff] [blame] | 104 | |
| 105 | unsigned int uart_platform_refclk(void) |
| 106 | { |
| 107 | return 62500000; |
| 108 | } |