Arthur Heymans | a1e46ae | 2018-12-15 18:26:05 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com> |
| 5 | * Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | |
Arthur Heymans | a1e46ae | 2018-12-15 18:26:05 +0100 | [diff] [blame] | 18 | #include <northbridge/intel/x4x/x4x.h> |
Arthur Heymans | a1e46ae | 2018-12-15 18:26:05 +0100 | [diff] [blame] | 19 | #include <superio/smsc/smscsuperio/smscsuperio.h> |
Arthur Heymans | a1e46ae | 2018-12-15 18:26:05 +0100 | [diff] [blame] | 20 | |
| 21 | #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) |
Arthur Heymans | a1e46ae | 2018-12-15 18:26:05 +0100 | [diff] [blame] | 22 | |
Arthur Heymans | bf53acc | 2019-11-11 21:14:39 +0100 | [diff] [blame^] | 23 | void mb_lpc_setup(void) |
Arthur Heymans | a1e46ae | 2018-12-15 18:26:05 +0100 | [diff] [blame] | 24 | { |
Arthur Heymans | a1e46ae | 2018-12-15 18:26:05 +0100 | [diff] [blame] | 25 | smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Arthur Heymans | bf53acc | 2019-11-11 21:14:39 +0100 | [diff] [blame^] | 26 | } |
Arthur Heymans | a1e46ae | 2018-12-15 18:26:05 +0100 | [diff] [blame] | 27 | |
Arthur Heymans | bf53acc | 2019-11-11 21:14:39 +0100 | [diff] [blame^] | 28 | void mb_get_spd_map(u8 spd_map[4]) |
| 29 | { |
| 30 | spd_map[0] = 0x50; |
| 31 | spd_map[2] = 0x52; |
Arthur Heymans | a1e46ae | 2018-12-15 18:26:05 +0100 | [diff] [blame] | 32 | } |