1. bf53acc nb/intel/x4x: Move boilerplate romstage to a common location by Arthur Heymans · 4 years, 9 months ago
  2. 2452afb mb/*/*(ich7/x4x): Use common early southbridge init by Arthur Heymans · 4 years, 9 months ago
  3. fecf777 sb/intel/i82801gx: Add common LPC decode code by Arthur Heymans · 4 years, 9 months ago
  4. 10cfd4d mb/{x4x}: Remove unused 'include <northbridge/intel/x4x/iomap.h>' by Elyes HAOUAS · 4 years, 9 months ago
  5. 2437fe9 sb/intel/i82801gx: Move CIR init to a common place by Arthur Heymans · 4 years, 11 months ago
  6. cd7a70f soc/intel: Use common romstage code by Kyösti Mälkki · 5 years ago
  7. 157b189 cpu/intel: Enter romstage without BIST by Kyösti Mälkki · 5 years ago
  8. 425e75a sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB by Patrick Rudolph · 5 years ago
  9. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  10. 0c152cf src: Remove unused include device/pnp_def.h by Elyes HAOUAS · 6 years ago
  11. f5a57a8 mb: Move timestamp_add_now to northbridge x4x by Elyes HAOUAS · 6 years ago
  12. 4513020 cpu/intel: Use the common code to initialize the romstage timestamps by Arthur Heymans · 6 years ago
  13. 6267f5d sb/intel/i82801gx: Autodisable functions based on devicetree by Arthur Heymans · 6 years ago
  14. c21df03 arch/x86: Drop spurious arch/stages.h includes by Kyösti Mälkki · 6 years ago
  15. a1e46ae mb/lenovo/thinkcentre_a58: Add mainboard by Arthur Heymans · 6 years ago