| Marshall Dawson | 9df969a | 2017-07-25 18:46:46 -0600 | [diff] [blame] | 1 | config SOC_AMD_COMMON_BLOCK_CAR |
| 2 | bool |
| 3 | default n |
| 4 | help |
| 5 | This option allows the SOC to use a standard AMD cache-as-ram (CAR) |
| Marshall Dawson | d61e832 | 2017-08-09 19:59:20 -0600 | [diff] [blame] | 6 | implementation. CAR setup is built into bootblock and teardown is |
| 7 | in postcar. The teardown procedure does not preserve the stack so |
| 8 | it may not be appropriate for a romstage implementation without |
| 9 | additional consideration. If this option is not used, the SOC must |
| 10 | implement these functions separately. |
| Felix Held | befec1e | 2020-11-06 00:26:03 +0100 | [diff] [blame] | 11 | This is only used for AMD CPU before family 17h. From family 17h on |
| 12 | the RAM is already initialized by the PSP before the x86 cores are |
| 13 | released from reset. |
| Felix Held | 9065f4f | 2020-11-21 02:12:54 +0100 | [diff] [blame] | 14 | |
| 15 | config SOC_AMD_COMMON_BLOCK_NONCAR |
| 16 | bool |
| 17 | default n |
| 18 | help |
| 19 | From family 17h on AMD CPUs/APUs don't use cache as RAM (CAR) any |
| 20 | more, since the RAM initialization is already done by the PSP when |
| 21 | the x86 cores are released from reset. |
| 22 | |
| 23 | if SOC_AMD_COMMON_BLOCK_NONCAR |
| 24 | |
| 25 | config MEMLAYOUT_LD_FILE |
| 26 | string |
| 27 | default "src/soc/amd/common/block/cpu/noncar/memlayout.ld" |
| 28 | |
| 29 | endif # SOC_AMD_COMMON_BLOCK_NONCAR |