wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
| 3 | #include <baseboard/gpio.h> |
| 4 | #include <baseboard/variants.h> |
| 5 | #include <commonlib/helpers.h> |
| 6 | #include <soc/gpio.h> |
| 7 | |
| 8 | /* Pad configuration in ramstage */ |
| 9 | static const struct pad_config override_gpio_table[] = { |
| 10 | /* A7 : NC ==> LTE_Present */ |
| 11 | PAD_CFG_GPI(GPP_A7, NONE, DEEP), |
Weimin Wu | b667e27 | 2023-11-14 16:14:25 +0800 | [diff] [blame] | 12 | /* A8 : GPP_A8 ==> WWAN_RF_DISABLE_ODL */ |
| 13 | PAD_CFG_GPO(GPP_A8, 1, DEEP), |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 14 | /* A18 : NC ==> HDMI_HPD_SRC*/ |
| 15 | PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), |
| 16 | |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 17 | /* A20 : DDSP_HPD2 ==> NC */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 18 | PAD_NC_LOCK(GPP_A20, NONE, LOCK_CONFIG), |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 19 | /* A21 : GPP_A21 ==> NC */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 20 | PAD_NC_LOCK(GPP_A21, NONE, LOCK_CONFIG), |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 21 | /* A22 : GPP_A22 ==> NC */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 22 | PAD_NC_LOCK(GPP_A22, NONE, LOCK_CONFIG), |
| 23 | |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 24 | /* B5 : I2C2_SDA ==> MIPI_WCAM_SDA */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 25 | PAD_CFG_NF_LOCK(GPP_B5, NONE, NF2, LOCK_CONFIG), |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 26 | /* B6 : I2C2_SCL ==> MIPI_WCAM_SCL */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 27 | PAD_CFG_NF_LOCK(GPP_B6, NONE, NF2, LOCK_CONFIG), |
| 28 | |
| 29 | /* B11 : NC ==> EN_PP3300_WLAN_X*/ |
| 30 | PAD_CFG_GPO(GPP_B11, 0, DEEP), |
| 31 | |
Weimin Wu | 64ae9fe | 2023-11-18 16:48:40 +0800 | [diff] [blame] | 32 | /* D6 : NC ==> WWAN_PWR_ENABLE */ |
| 33 | PAD_CFG_GPO(GPP_D6, 1, DEEP), |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 34 | /* D8 : SRCCLKREQ3# ==> NC */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 35 | PAD_NC_LOCK(GPP_D8, NONE, LOCK_CONFIG), |
| 36 | /* D13 : NC ==> EN_PP1800_WCAM_X */ |
Weimin Wu | fd1c2f4 | 2023-11-17 22:12:54 +0800 | [diff] [blame] | 37 | PAD_CFG_GPO_LOCK(GPP_D13, 1, LOCK_CONFIG), |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 38 | |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 39 | /* E20 : DDP2_CTRLCLK ==> NC */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 40 | PAD_NC_LOCK(GPP_E20, NONE, LOCK_CONFIG), |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 41 | /* E21 : DDP2_CTRLDATA ==> GPP_E21_STRAP */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 42 | PAD_NC_LOCK(GPP_E21, NONE, LOCK_CONFIG), |
| 43 | |
| 44 | /* H22 : IMGCLKOUT3 ==> WCAM_MCLK_R */ |
| 45 | PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1), |
| 46 | /* H23 : WWAN_SAR_DETECT_ODL */ |
| 47 | PAD_CFG_GPO(GPP_H23, 1, DEEP), |
| 48 | |
| 49 | /* F11 : NC ==> WWAN_PWR_ON */ |
| 50 | PAD_CFG_GPO_LOCK(GPP_F11, 1, LOCK_CONFIG), |
| 51 | /* F12 : GSXDOUT ==> WWAN_RST_L */ |
| 52 | PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), |
Weimin Wu | fd1c2f4 | 2023-11-17 22:12:54 +0800 | [diff] [blame] | 53 | /* F18 : THC1_SPI2_INT# ==> EN_PP2800_AFVDD */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 54 | PAD_CFG_GPO(GPP_F18, 0, DEEP), |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 55 | /* F23 : V1P05_CTRL ==> NC*/ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 56 | PAD_NC_LOCK(GPP_F23, NONE, LOCK_CONFIG), |
| 57 | |
| 58 | |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 59 | /* H12 : UART0_RTS# ==> NC*/ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 60 | PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG), |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 61 | /* H13 : UART0_CTS# ==> NC */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 62 | PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG), |
| 63 | /* H15 : DDPB_CTRLCLK ==> HDMI_DDC_SCL */ |
| 64 | PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), |
| 65 | /* H17 : DDPB_CTRLDATA ==> HDMI_DDC_SDA */ |
| 66 | PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), |
| 67 | |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 68 | /* R6 : DMIC_CLK_A_1A ==> NC */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 69 | PAD_NC_LOCK(GPP_R6, NONE, LOCK_CONFIG), |
Weimin Wu | b9523a4 | 2023-11-30 23:20:10 +0800 | [diff] [blame^] | 70 | /* R7 : DMIC_DATA_1A ==> NC */ |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 71 | PAD_NC_LOCK(GPP_R7, NONE, LOCK_CONFIG), |
| 72 | }; |
| 73 | |
| 74 | /* Early pad configuration in bootblock */ |
| 75 | static const struct pad_config early_gpio_table[] = { |
Weimin Wu | 10db713 | 2023-11-18 12:03:40 +0800 | [diff] [blame] | 76 | /* C0 : SMBCLK ==> EN_PP3300_TCHSCR_X */ |
| 77 | PAD_CFG_GPO(GPP_C0, 1, DEEP), |
| 78 | /* C1 : SMBDATA ==> TCHSCR_RST_L */ |
| 79 | PAD_CFG_GPO(GPP_C1, 1, DEEP), |
| 80 | |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 81 | /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */ |
| 82 | PAD_CFG_GPO(GPP_H20, 0, DEEP), |
| 83 | /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */ |
| 84 | PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), |
| 85 | /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */ |
| 86 | PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP), |
| 87 | |
| 88 | /* F11 : NC ==> WWAN_PWR_ON */ |
| 89 | PAD_CFG_GPO(GPP_F11, 1, DEEP), |
| 90 | /* F12 : GSXDOUT ==> WWAN_RST_L */ |
| 91 | PAD_CFG_GPO(GPP_F12, 0, DEEP), |
Weimin Wu | b667e27 | 2023-11-14 16:14:25 +0800 | [diff] [blame] | 92 | /* D6 : NC ==> WWAN_PWR_ENABLE */ |
| 93 | PAD_CFG_GPO(GPP_D6, 1, DEEP), |
wuweimin | b0b9bbc | 2023-10-17 16:03:08 +0800 | [diff] [blame] | 94 | |
| 95 | /* H4 : I2C0_SDA ==> SOC_I2C_GSC_SDA */ |
| 96 | PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), |
| 97 | /* H5 : I2C0_SCL ==> SOC_I2C_GSC_SCL */ |
| 98 | PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), |
| 99 | |
| 100 | /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */ |
| 101 | PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), |
| 102 | /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */ |
| 103 | PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), |
| 104 | }; |
| 105 | |
| 106 | static const struct pad_config romstage_gpio_table[] = { |
| 107 | /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */ |
| 108 | PAD_CFG_GPO(GPP_H20, 1, DEEP), |
| 109 | }; |
| 110 | |
| 111 | const struct pad_config *variant_gpio_override_table(size_t *num) |
| 112 | { |
| 113 | *num = ARRAY_SIZE(override_gpio_table); |
| 114 | return override_gpio_table; |
| 115 | } |
| 116 | |
| 117 | const struct pad_config *variant_early_gpio_table(size_t *num) |
| 118 | { |
| 119 | *num = ARRAY_SIZE(early_gpio_table); |
| 120 | return early_gpio_table; |
| 121 | } |
| 122 | |
| 123 | const struct pad_config *variant_romstage_gpio_table(size_t *num) |
| 124 | { |
| 125 | *num = ARRAY_SIZE(romstage_gpio_table); |
| 126 | return romstage_gpio_table; |
| 127 | } |