Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 1 | #include <console/console.h> |
| 2 | #include <arch/smp/mpspec.h> |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 3 | #include <arch/ioapic.h> |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 4 | #include <device/pci.h> |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 5 | #include <device/pci_ids.h> |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 6 | #include <string.h> |
| 7 | #include <stdint.h> |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 8 | #if CONFIG_LOGICAL_CPUS==1 |
Stefan Reinauer | 9a16e3e | 2010-03-29 14:45:36 +0000 | [diff] [blame] | 9 | #include <cpu/amd/multicore.h> |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 10 | #endif |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 11 | |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 12 | static unsigned node_link_to_bus(unsigned node, unsigned link) |
| 13 | { |
| 14 | device_t dev; |
| 15 | unsigned reg; |
| 16 | |
| 17 | dev = dev_find_slot(0, PCI_DEVFN(0x18, 1)); |
| 18 | if (!dev) { |
| 19 | return 0; |
| 20 | } |
| 21 | for(reg = 0xE0; reg < 0xF0; reg += 0x04) { |
| 22 | uint32_t config_map; |
| 23 | unsigned dst_node; |
| 24 | unsigned dst_link; |
| 25 | unsigned bus_base; |
| 26 | config_map = pci_read_config32(dev, reg); |
| 27 | if ((config_map & 3) != 3) { |
| 28 | continue; |
| 29 | } |
| 30 | dst_node = (config_map >> 4) & 7; |
| 31 | dst_link = (config_map >> 8) & 3; |
| 32 | bus_base = (config_map >> 16) & 0xff; |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 33 | #if 0 |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 34 | printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n", |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 35 | dst_node, dst_link, bus_base, |
| 36 | reg, config_map); |
| 37 | #endif |
| 38 | if ((dst_node == node) && (dst_link == link)) |
| 39 | { |
| 40 | return bus_base; |
| 41 | } |
| 42 | } |
| 43 | return 0; |
| 44 | } |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 45 | |
Myles Watson | 08e0fb8 | 2010-03-22 16:33:25 +0000 | [diff] [blame] | 46 | static void *smp_write_config_table(void *v) |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 47 | { |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 48 | struct mp_config_table *mc; |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 49 | unsigned char bus_num; |
| 50 | unsigned char bus_isa; |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 51 | unsigned char bus_chain_0; |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 52 | unsigned char bus_8131_1; |
| 53 | unsigned char bus_8131_2; |
| 54 | unsigned char bus_8111_1; |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 55 | unsigned apicid_base; |
| 56 | unsigned apicid_8111; |
| 57 | unsigned apicid_8131_1; |
| 58 | unsigned apicid_8131_2; |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 59 | |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 60 | mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 61 | |
Uwe Hermann | 55dc223 | 2010-10-25 15:32:07 +0000 | [diff] [blame] | 62 | mptable_init(mc, "S2882 ", LAPIC_ADDR); |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 63 | |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 64 | smp_write_processors(mc); |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 65 | { |
| 66 | device_t dev; |
| 67 | |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 68 | /* HT chain 0 */ |
| 69 | bus_chain_0 = node_link_to_bus(0, 0); |
| 70 | if (bus_chain_0 == 0) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 71 | printk(BIOS_DEBUG, "ERROR - cound not find bus for node 0 chain 0, using defaults\n"); |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 72 | bus_chain_0 = 1; |
| 73 | } |
| 74 | |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 75 | /* 8111 */ |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 76 | dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0)); |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 77 | if (dev) { |
| 78 | bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 79 | bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 80 | bus_isa++; |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 81 | } |
| 82 | else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 83 | printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n"); |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 84 | |
| 85 | bus_8111_1 = 4; |
| 86 | bus_isa = 5; |
| 87 | } |
| 88 | /* 8131-1 */ |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 89 | dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0)); |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 90 | if (dev) { |
| 91 | bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 92 | |
| 93 | } |
| 94 | else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 95 | printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n"); |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 96 | |
| 97 | bus_8131_1 = 2; |
| 98 | } |
| 99 | /* 8131-2 */ |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 100 | dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0)); |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 101 | if (dev) { |
| 102 | bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 103 | |
| 104 | } |
| 105 | else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 106 | printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n"); |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 107 | |
| 108 | bus_8131_2 = 3; |
| 109 | } |
| 110 | } |
| 111 | /*Bus: Bus ID Type*/ |
| 112 | /* define bus and isa numbers */ |
| 113 | for(bus_num = 0; bus_num < bus_isa; bus_num++) { |
| 114 | smp_write_bus(mc, bus_num, "PCI "); |
| 115 | } |
| 116 | smp_write_bus(mc, bus_isa, "ISA "); |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 117 | |
| 118 | |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 119 | /*I/O APICs: APIC ID Version State Address*/ |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 120 | #if CONFIG_LOGICAL_CPUS==1 |
| 121 | apicid_base = get_apicid_base(3); |
| 122 | #else |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 123 | apicid_base = CONFIG_MAX_PHYSICAL_CPUS; |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 124 | #endif |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 125 | apicid_8111 = apicid_base+0; |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 126 | apicid_8131_1 = apicid_base+1; |
| 127 | apicid_8131_2 = apicid_base+2; |
| 128 | |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 129 | smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR); |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 130 | { |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 131 | device_t dev; |
| 132 | struct resource *res; |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 133 | dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x1,1)); |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 134 | if (dev) { |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 135 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 136 | if (res) { |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 137 | smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base); |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 138 | } |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 139 | } |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 140 | dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x2,1)); |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 141 | if (dev) { |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 142 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 143 | if (res) { |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 144 | smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base); |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 145 | } |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 146 | } |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 147 | |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 148 | } |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 149 | |
Patrick Georgi | c5b87c8 | 2010-05-20 15:28:19 +0000 | [diff] [blame] | 150 | mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0); |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 151 | |
Patrick Georgi | c5b87c8 | 2010-05-20 15:28:19 +0000 | [diff] [blame] | 152 | /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ |
arch import user (historical) | 59140cc | 2005-07-06 18:17:35 +0000 | [diff] [blame] | 153 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (4<<2)|3, apicid_8111, 0x13); |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 154 | |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 155 | |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 156 | //On Board AMD USB |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 157 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13); |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 158 | |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 159 | |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 160 | //On Board ATI Display Adapter |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 161 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (6<<2)|0, apicid_8111, 0x12); |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 162 | |
| 163 | #if 1 |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 164 | //Slot 5 PCI 32 |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 165 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (4<<2)|0, apicid_8111, 0x10); |
| 166 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (4<<2)|1, apicid_8111, 0x11); |
| 167 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (4<<2)|2, apicid_8111, 0x12); // |
| 168 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (4<<2)|3, apicid_8111, 0x13); // |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 169 | |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 170 | #endif |
| 171 | //Onboard SI Serial ATA |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 172 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (5<<2)|0, apicid_8111, 0x13); |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 173 | |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 174 | //Onboard Intel 82551 10/100M NIC |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 175 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (8<<2)|0, apicid_8111, 0x12); |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 176 | |
Ronald G. Minnich | b56ef07 | 2003-10-15 20:05:11 +0000 | [diff] [blame] | 177 | #if 1 |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 178 | //Slot 3 PCIX 100/66 |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 179 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|0, apicid_8131_1, 0x3); |
| 180 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|1, apicid_8131_1, 0x0); |
| 181 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|2, apicid_8131_1, 0x1);// |
| 182 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|3, apicid_8131_1, 0x2);// |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 183 | |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 184 | //Slot 4 PCIX 100/66 |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 185 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|0, apicid_8131_1, 0x2); |
| 186 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|1, apicid_8131_1, 0x3);// |
| 187 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|2, apicid_8131_1, 0x0);// |
| 188 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|3, apicid_8131_1, 0x1);// |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 189 | |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 190 | |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 191 | #endif |
| 192 | //Onboard adaptec scsi |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 193 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (6<<2)|0, apicid_8131_1, 0x0); |
| 194 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (6<<2)|1, apicid_8131_1, 0x1); |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 195 | |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 196 | //On Board NIC |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 197 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (9<<2)|0, apicid_8131_1, 0x0); |
| 198 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (9<<2)|1, apicid_8131_1, 0x1); |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 199 | |
| 200 | |
Ronald G. Minnich | b56ef07 | 2003-10-15 20:05:11 +0000 | [diff] [blame] | 201 | #if 1 |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 202 | //Slot 1 PCI-X 133/100/66 |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 203 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|0, apicid_8131_2, 0x0); |
| 204 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|1, apicid_8131_2, 0x1); |
| 205 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|2, apicid_8131_2, 0x2); // |
| 206 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|3, apicid_8131_2, 0x3); // |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 207 | |
| 208 | //Slot 2 PCI-X 133/100/66 |
arch import user (historical) | ef03afa | 2005-07-06 17:15:30 +0000 | [diff] [blame] | 209 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|0, apicid_8131_2, 0x1); |
| 210 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|1, apicid_8131_2, 0x2); |
| 211 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|2, apicid_8131_2, 0x3);// |
| 212 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|3, apicid_8131_2, 0x0);// |
Ronald G. Minnich | e4fc0ab | 2004-03-12 15:13:38 +0000 | [diff] [blame] | 213 | |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 214 | #endif |
| 215 | /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ |
Tobias Diedrich | b907d32 | 2010-10-26 22:40:16 +0000 | [diff] [blame^] | 216 | smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0); |
| 217 | smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1); |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 218 | /* There is no extension information... */ |
| 219 | |
| 220 | /* Compute the checksums */ |
| 221 | mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); |
| 222 | mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 223 | printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 224 | mc, smp_next_mpe_entry(mc)); |
| 225 | return smp_next_mpe_entry(mc); |
| 226 | } |
| 227 | |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 228 | unsigned long write_smp_table(unsigned long addr) |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 229 | { |
| 230 | void *v; |
| 231 | v = smp_write_floating_table(addr); |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 232 | return (unsigned long)smp_write_config_table(v); |
Ronald G. Minnich | fa2df75 | 2003-08-27 14:33:13 +0000 | [diff] [blame] | 233 | } |