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Mariusz Szafranskia4041332017-08-02 17:28:17 +02001/*
2 * This file is part of the coreboot project.
3 *
Praveen hodagatta praneshb66757f2018-10-23 02:43:05 +08004 * Copyright (C) 2018 Intel Corp.
Mariusz Szafranskia4041332017-08-02 17:28:17 +02005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <device/pci_def.h>
18#include <cpu/x86/mtrr.h>
19#include <cpu/x86/cache.h>
20#include <cpu/x86/cr.h>
21#include <cpu/x86/post_code.h>
Praveen hodagatta praneshb66757f2018-10-23 02:43:05 +080022#include <../../../../../arch/x86/walkcbfs.S>
Mariusz Szafranskia4041332017-08-02 17:28:17 +020023
Mariusz Szafranskia4041332017-08-02 17:28:17 +020024
25.extern temp_ram_init_params
26
27.global bootblock_pre_c_entry
28bootblock_pre_c_entry:
29
30.global cache_as_ram
31cache_as_ram:
Praveen hodagatta praneshb66757f2018-10-23 02:43:05 +080032 post_code(0x21)
Mariusz Szafranskia4041332017-08-02 17:28:17 +020033
34 /* find fsp in cbfs */
35 lea fsp_name, %esi
36 mov $1f, %esp
37 jmp walkcbfs_asm
381:
39 cmp $0, %eax
40 jz .halt_forever
41 mov CBFS_FILE_OFFSET(%eax), %ebx
42 bswap %ebx
43 add %eax, %ebx
Praveen hodagatta praneshb66757f2018-10-23 02:43:05 +080044 add $0x94, %ebx
Mariusz Szafranskia4041332017-08-02 17:28:17 +020045
46 /*
47 * save mm2 into ebp, because TempRamInit API doesn't preserve
48 * mm2 register
49 */
50 movd %mm2, %ebp
51
52 /*
53 * ebx = FSP INFO HEADER
54 * Calculate entry into FSP
55 */
56 movl 0x30(%ebx), %eax /* Load TempRamInitEntryOffset */
57 addl 0x1c(%ebx), %eax /* add the FSP ImageBase */
58
59 /*
60 * Pass early init variables on a fake stack (no memory yet)
61 * as well as the return location
62 */
63 leal CAR_init_stack, %esp
64
65 /* call FSP binary to setup temporary stack */
66 jmp *%eax
67
68/*
69 * If the TempRamInit API is successful, then when returning, the ECX and
70 * EDX registers will point to the temporary but writeable memory range
71 * available to the bootloader where ECX is the start and EDX is the end of
Praveen hodagatta praneshb66757f2018-10-23 02:43:05 +080072 * the range i.e. [ECX,EDX). See FSP Integration Guide for more information.
Mariusz Szafranskia4041332017-08-02 17:28:17 +020073 *
74 * Return Values:
75 * EAX | Return Status
76 * ECX | Temporary Memory Start
77 * EDX | Temporary Memory End
78 * EBX, EDI, ESI, EBP, MM0, MM1 | Preserved Through API Call
79 */
80
81CAR_init_done:
82 cmp $0, %eax
83 jnz .halt_forever
84
Praveen hodagatta praneshb66757f2018-10-23 02:43:05 +080085 /* Setup bootblock stack */
86 mov %edx, %esp
87
Mariusz Szafranskia4041332017-08-02 17:28:17 +020088 /* clear CAR_GLOBAL area as it is not shared */
89 cld
Praveen hodagatta praneshb66757f2018-10-23 02:43:05 +080090 xor %eax, %eax
91 movl $(_car_global_end), %ecx
92 movl $(_car_global_start), %edi
93 sub %edi, %ecx
Mariusz Szafranskia4041332017-08-02 17:28:17 +020094 shrl $2, %ecx
Praveen hodagatta praneshb66757f2018-10-23 02:43:05 +080095 rep stosl
Mariusz Szafranskia4041332017-08-02 17:28:17 +020096
97 /* Restore the timestamp from bootblock_crt0.S (ebp:mm1) */
98 push %ebp
Praveen hodagatta praneshb66757f2018-10-23 02:43:05 +080099 movd %mm1, %eax
100 push %eax
Mariusz Szafranskia4041332017-08-02 17:28:17 +0200101
102 /* We can call into C functions now */
103 call bootblock_c_entry
104
105 /* Never reached */
106
107.halt_forever:
108 post_code(POST_DEAD_CODE)
109 hlt
110 jmp .halt_forever
111
Mariusz Szafranskia4041332017-08-02 17:28:17 +0200112CAR_init_stack:
113 .long CAR_init_done
114 .long temp_ram_init_params
115
116fsp_name:
Praveen hodagatta praneshb66757f2018-10-23 02:43:05 +0800117 .string "fspt.bin"