blob: 704a4102516e4b24ca27fa1792dab05f2adfca0f [file] [log] [blame]
Alexander Couzensdb508562016-10-12 04:44:19 +02001chip northbridge/intel/sandybridge
Nico Huberb0b25c82020-03-21 20:35:12 +01002 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
Alexander Couzensdb508562016-10-12 04:44:19 +02003 register "gpu_cpu_backlight" = "0x00001155"
4 register "gpu_dp_b_hotplug" = "4"
5 register "gpu_dp_c_hotplug" = "4"
6 register "gpu_dp_d_hotplug" = "4"
Angel Ponsdc0c0812020-09-02 19:17:30 +02007 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Alexander Couzensdb508562016-10-12 04:44:19 +02008 register "gpu_panel_power_backlight_off_delay" = "2000"
9 register "gpu_panel_power_backlight_on_delay" = "3000"
10 register "gpu_panel_power_cycle_delay" = "6"
11 register "gpu_panel_power_down_delay" = "300"
12 register "gpu_panel_power_up_delay" = "300"
13 register "gpu_pch_backlight" = "0x11551155"
14
Alexander Couzensdb508562016-10-12 04:44:19 +020015 device domain 0 on
Peter Lemenkov9e81aac2019-12-27 10:04:30 +030016 subsystemid 0x17aa 0x21f9 inherit
17
Arthur Heymansb5df65a2022-11-12 14:51:49 +010018 device ref host_bridge on end # host bridge
19 device ref peg10 off end # PCIe Bridge for discrete graphics
20 device ref igd on end # vga controller
Alexander Couzensdb508562016-10-12 04:44:19 +020021
22 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
23 # GPI routing
24 # 0 No effect (default)
25 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
26 # 2 SCI (if corresponding GPIO_EN bit is also set)
27 register "alt_gp_smi_en" = "0x0000"
28 register "gpi1_routing" = "2"
29 register "gpi13_routing" = "2"
30
31 # Enable SATA ports 0 (HDD bay) 2 (msata)
32 register "sata_port_map" = "0x5"
33 # Set max SATA speed to 6.0 Gb/s
34 register "sata_interface_speed_support" = "0x3"
35
36 register "gen1_dec" = "0x7c1601"
37 register "gen2_dec" = "0x0c15e1"
38 register "gen3_dec" = "0x000000"
39 register "gen4_dec" = "0x0c06a1"
40
41 register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
42
43 register "xhci_switchable_ports" = "0xf"
44 register "superspeed_capable_ports" = "0xf"
45 register "xhci_overcurrent_mapping" = "0x4000201"
46
47 # Enable zero-based linear PCIe root port functions
Angel Ponsaf4bd562021-12-28 13:05:56 +010048 register "pcie_port_coalesce" = "true"
Alexander Couzensdb508562016-10-12 04:44:19 +020049
Patrick Rudolphc670a412017-04-28 17:28:32 +020050 register "spi_uvscc" = "0x2005"
51 register "spi_lvscc" = "0x2005"
52
Arthur Heymansb5df65a2022-11-12 14:51:49 +010053 device ref xhci on end # USB 3.0 Controller
54 device ref mei1 on end # Management Engine Interface 1
55 device ref mei2 off end # Management Engine Interface 2
56 device ref me_ide_r off end # Management Engine IDE-R
57 device ref me_kt off end # Management Engine KT
58 device ref gbe off end # Intel Gigabit Ethernet
59 device ref ehci2 on end # USB2 EHCI #2
60 device ref hda on end # High Definition Audio
61 device ref pcie_rp1 on
Alexander Couzensdb508562016-10-12 04:44:19 +020062 chip drivers/ricoh/rce822
63 register "sdwppol" = "0"
64 register "disable_mask" = "0x87"
Peter Lemenkov9e81aac2019-12-27 10:04:30 +030065 device pci 00.0 on end
Alexander Couzensdb508562016-10-12 04:44:19 +020066 end
67 end # PCIe Port #1
Arthur Heymansb5df65a2022-11-12 14:51:49 +010068 device ref pcie_rp2 on end # PCIe Port #2
69 device ref pcie_rp3 off end # PCIe Port #3
70 device ref pcie_rp4 off end # PCIe Port #4
71 device ref pcie_rp5 off end # PCIe Port #5
72 device ref pcie_rp6 off end # PCIe Port #6
73 device ref pcie_rp7 off end # PCIe Port #7
74 device ref pcie_rp8 off end # PCIe Port #8
75 device ref ehci1 on end # USB2 EHCI #1
76 device ref pci_bridge off end # PCI bridge
77 device ref lpc on #LPC bridge
Alexander Couzensdb508562016-10-12 04:44:19 +020078 chip ec/lenovo/pmh7
Peter Lemenkov9e81aac2019-12-27 10:04:30 +030079 device pnp ff.1 on end # dummy
Alexander Couzensdb508562016-10-12 04:44:19 +020080 register "backlight_enable" = "0x01"
81 register "dock_event_enable" = "0x01"
82 end
83
84 chip drivers/pc80/tpm
Elyes HAOUASb0f19882018-06-09 11:59:00 +020085 device pnp 0c31.0 on end
Alexander Couzensdb508562016-10-12 04:44:19 +020086 end
87
88 chip ec/lenovo/h8
89 device pnp ff.2 on # dummy
90 io 0x60 = 0x62
91 io 0x62 = 0x66
92 io 0x64 = 0x1600
93 io 0x66 = 0x1604
94 end
95
96 register "has_keyboard_backlight" = "1"
97
98 register "beepmask0" = "0x00"
99 register "beepmask1" = "0x86"
100 register "config0" = "0xa6"
101 register "config1" = "0x05"
102 register "config2" = "0xa0"
103 register "config3" = "0xc0"
104 register "event2_enable" = "0xff"
105 register "event3_enable" = "0xff"
106 register "event4_enable" = "0xc0"
107 register "event5_enable" = "0x3c"
108 register "event7_enable" = "0x01"
109 register "event8_enable" = "0x7b"
110 register "event9_enable" = "0xff"
111 register "eventc_enable" = "0xff"
112 register "eventd_enable" = "0xff"
113 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200114
115 register "has_bdc_detection" = "1"
116 register "bdc_gpio_num" = "54"
117 register "bdc_gpio_lvl" = "0"
Patrick Rudolph7d7c6312017-08-13 12:51:27 +0200118
119 register "has_wwan_detection" = "1"
120 register "wwan_gpio_num" = "70"
121 register "wwan_gpio_lvl" = "0"
Alexander Couzensdb508562016-10-12 04:44:19 +0200122 end
123 end # LPC bridge
Arthur Heymansb5df65a2022-11-12 14:51:49 +0100124 device ref sata1 on end # SATA Controller 1
125 device ref smbus on
Elyes HAOUASb0f19882018-06-09 11:59:00 +0200126 # eeprom, 8 virtual devices, same chip
Alexander Couzensdb508562016-10-12 04:44:19 +0200127 chip drivers/i2c/at24rf08c
128 device i2c 54 on end
129 device i2c 55 on end
130 device i2c 56 on end
131 device i2c 57 on end
132 device i2c 5c on end
133 device i2c 5d on end
134 device i2c 5e on end
135 device i2c 5f on end
136 end
137 end # SMBus
Arthur Heymansb5df65a2022-11-12 14:51:49 +0100138 device ref sata2 off end # SATA Controller 2
139 device ref thermal on end # Thermal
Alexander Couzensdb508562016-10-12 04:44:19 +0200140 end
141 end
142end