Alexander Couzens | db50856 | 2016-10-12 04:44:19 +0200 | [diff] [blame] | 1 | chip northbridge/intel/sandybridge |
| 2 | register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }" |
| 3 | register "gfx.link_frequency_270_mhz" = "1" |
| 4 | register "gfx.ndid" = "3" |
| 5 | register "gfx.use_spread_spectrum_clock" = "1" |
| 6 | register "gpu_cpu_backlight" = "0x00001155" |
| 7 | register "gpu_dp_b_hotplug" = "4" |
| 8 | register "gpu_dp_c_hotplug" = "4" |
| 9 | register "gpu_dp_d_hotplug" = "4" |
| 10 | register "gpu_panel_port_select" = "0" |
| 11 | register "gpu_panel_power_backlight_off_delay" = "2000" |
| 12 | register "gpu_panel_power_backlight_on_delay" = "3000" |
| 13 | register "gpu_panel_power_cycle_delay" = "6" |
| 14 | register "gpu_panel_power_down_delay" = "300" |
| 15 | register "gpu_panel_power_up_delay" = "300" |
| 16 | register "gpu_pch_backlight" = "0x11551155" |
| 17 | |
Alexander Couzens | db50856 | 2016-10-12 04:44:19 +0200 | [diff] [blame] | 18 | device cpu_cluster 0 on |
| 19 | chip cpu/intel/socket_rPGA989 |
| 20 | device lapic 0 on end |
| 21 | end |
| 22 | chip cpu/intel/model_206ax |
| 23 | # Magic APIC ID to locate this chip |
| 24 | device lapic 0xACAC off end |
| 25 | |
| 26 | register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) |
| 27 | register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) |
| 28 | register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7) |
| 29 | |
| 30 | register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1) |
| 31 | register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3) |
| 32 | register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7) |
| 33 | end |
| 34 | end |
| 35 | |
| 36 | register "pci_mmio_size" = "1024" |
| 37 | |
| 38 | device domain 0 on |
| 39 | device pci 00.0 on |
| 40 | subsystemid 0x17aa 0x21fa |
| 41 | end # host bridge |
| 42 | device pci 01.0 off end # PCIe Bridge for discrete graphics |
| 43 | device pci 02.0 on |
| 44 | subsystemid 0x17aa 0x21fa |
| 45 | end # vga controller |
| 46 | |
| 47 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
| 48 | # GPI routing |
| 49 | # 0 No effect (default) |
| 50 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 51 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
| 52 | register "alt_gp_smi_en" = "0x0000" |
| 53 | register "gpi1_routing" = "2" |
| 54 | register "gpi13_routing" = "2" |
| 55 | |
| 56 | # Enable SATA ports 0 (HDD bay) 2 (msata) |
| 57 | register "sata_port_map" = "0x5" |
| 58 | # Set max SATA speed to 6.0 Gb/s |
| 59 | register "sata_interface_speed_support" = "0x3" |
| 60 | |
| 61 | register "gen1_dec" = "0x7c1601" |
| 62 | register "gen2_dec" = "0x0c15e1" |
| 63 | register "gen3_dec" = "0x000000" |
| 64 | register "gen4_dec" = "0x0c06a1" |
| 65 | |
| 66 | register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" |
| 67 | |
| 68 | register "xhci_switchable_ports" = "0xf" |
| 69 | register "superspeed_capable_ports" = "0xf" |
| 70 | register "xhci_overcurrent_mapping" = "0x4000201" |
| 71 | |
| 72 | # Enable zero-based linear PCIe root port functions |
| 73 | register "pcie_port_coalesce" = "1" |
| 74 | register "c2_latency" = "101" # c2 not supported |
| 75 | register "p_cnt_throttling_supported" = "1" |
| 76 | |
Patrick Rudolph | c670a41 | 2017-04-28 17:28:32 +0200 | [diff] [blame] | 77 | register "spi_uvscc" = "0x2005" |
| 78 | register "spi_lvscc" = "0x2005" |
| 79 | |
Alexander Couzens | db50856 | 2016-10-12 04:44:19 +0200 | [diff] [blame] | 80 | device pci 14.0 on |
| 81 | subsystemid 0x17aa 0x21f9 |
| 82 | end # USB 3.0 Controller |
| 83 | device pci 16.0 on |
| 84 | subsystemid 0x17aa 0x21f9 |
| 85 | end # Management Engine Interface 1 |
| 86 | device pci 16.1 off end # Management Engine Interface 2 |
| 87 | device pci 16.2 off end # Management Engine IDE-R |
| 88 | device pci 16.3 off end # Management Engine KT |
| 89 | device pci 19.0 off end # Intel Gigabit Ethernet |
| 90 | device pci 1a.0 on |
| 91 | subsystemid 0x17aa 0x21f9 |
| 92 | end # USB2 EHCI #2 |
| 93 | device pci 1b.0 on |
| 94 | subsystemid 0x17aa 0x21f9 |
| 95 | end # High Definition Audio |
| 96 | device pci 1c.0 on |
| 97 | subsystemid 0x17aa 0x21f9 |
| 98 | chip drivers/ricoh/rce822 |
| 99 | register "sdwppol" = "0" |
| 100 | register "disable_mask" = "0x87" |
| 101 | device pci 00.0 on |
| 102 | subsystemid 0x17aa 0x21f3 |
| 103 | end |
| 104 | end |
| 105 | end # PCIe Port #1 |
| 106 | device pci 1c.1 on |
| 107 | subsystemid 0x17aa 0x21f9 |
| 108 | end # PCIe Port #2 |
| 109 | device pci 1c.2 off end # PCIe Port #3 |
| 110 | device pci 1c.3 off end # PCIe Port #4 |
| 111 | device pci 1c.4 off end # PCIe Port #5 |
| 112 | device pci 1c.5 off end # PCIe Port #6 |
| 113 | device pci 1c.6 off end # PCIe Port #7 |
| 114 | device pci 1c.7 off end # PCIe Port #8 |
| 115 | device pci 1d.0 on |
| 116 | subsystemid 0x17aa 0x21f9 |
| 117 | end # USB2 EHCI #1 |
| 118 | device pci 1e.0 off end # PCI bridge |
| 119 | device pci 1f.0 on #LPC bridge |
| 120 | subsystemid 0x17aa 0x21f9 |
| 121 | chip ec/lenovo/pmh7 |
| 122 | device pnp ff.1 on # dummy |
| 123 | end |
| 124 | register "backlight_enable" = "0x01" |
| 125 | register "dock_event_enable" = "0x01" |
| 126 | end |
| 127 | |
| 128 | chip drivers/pc80/tpm |
| 129 | device pnp 0c31.0 on end |
| 130 | end |
| 131 | |
| 132 | chip ec/lenovo/h8 |
| 133 | device pnp ff.2 on # dummy |
| 134 | io 0x60 = 0x62 |
| 135 | io 0x62 = 0x66 |
| 136 | io 0x64 = 0x1600 |
| 137 | io 0x66 = 0x1604 |
| 138 | end |
| 139 | |
| 140 | register "has_keyboard_backlight" = "1" |
| 141 | |
| 142 | register "beepmask0" = "0x00" |
| 143 | register "beepmask1" = "0x86" |
| 144 | register "config0" = "0xa6" |
| 145 | register "config1" = "0x05" |
| 146 | register "config2" = "0xa0" |
| 147 | register "config3" = "0xc0" |
| 148 | register "event2_enable" = "0xff" |
| 149 | register "event3_enable" = "0xff" |
| 150 | register "event4_enable" = "0xc0" |
| 151 | register "event5_enable" = "0x3c" |
| 152 | register "event7_enable" = "0x01" |
| 153 | register "event8_enable" = "0x7b" |
| 154 | register "event9_enable" = "0xff" |
| 155 | register "eventc_enable" = "0xff" |
| 156 | register "eventd_enable" = "0xff" |
| 157 | register "evente_enable" = "0x0d" |
Patrick Rudolph | b77eec8 | 2017-05-21 09:20:39 +0200 | [diff] [blame^] | 158 | |
| 159 | register "has_bdc_detection" = "1" |
| 160 | register "bdc_gpio_num" = "54" |
| 161 | register "bdc_gpio_lvl" = "0" |
Alexander Couzens | db50856 | 2016-10-12 04:44:19 +0200 | [diff] [blame] | 162 | end |
| 163 | end # LPC bridge |
| 164 | device pci 1f.2 on |
| 165 | subsystemid 0x17aa 0x21f9 |
| 166 | end # SATA Controller 1 |
| 167 | device pci 1f.3 on |
| 168 | subsystemid 0x17aa 0x21f9 |
| 169 | # eeprom, 8 virtual devices, same chip |
| 170 | chip drivers/i2c/at24rf08c |
| 171 | device i2c 54 on end |
| 172 | device i2c 55 on end |
| 173 | device i2c 56 on end |
| 174 | device i2c 57 on end |
| 175 | device i2c 5c on end |
| 176 | device i2c 5d on end |
| 177 | device i2c 5e on end |
| 178 | device i2c 5f on end |
| 179 | end |
| 180 | end # SMBus |
| 181 | device pci 1f.5 off end # SATA Controller 2 |
| 182 | device pci 1f.6 on |
| 183 | subsystemid 0x17aa 0x21f9 |
| 184 | end # Thermal |
| 185 | end |
| 186 | end |
| 187 | end |