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Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -07001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -07004
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
7
8 # Enable Panel as LVDS and configure power delays
Angel Ponsdc0c0812020-09-02 19:17:30 +02009 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -070010 register "gpu_panel_power_cycle_delay" = "5" # T4: 400ms
11 register "gpu_panel_power_up_delay" = "400" # T1+T2: 40ms
12 register "gpu_panel_power_down_delay" = "150" # T3: 15ms
13 register "gpu_panel_power_backlight_on_delay" = "2100" # T5: 210ms
14 register "gpu_panel_power_backlight_off_delay" = "2100" # TD: 210ms
15
Vladimir Serbinenko93fc6062016-01-31 13:21:04 +010016 # For native gfx
Vladimir Serbinenko93fc6062016-01-31 13:21:04 +010017 register "gpu_cpu_backlight" = "0x1155"
18 register "gpu_pch_backlight" = "0x06100610"
19
Vladimir Serbinenkof004b6b2016-02-10 02:42:16 +010020 register "max_mem_clock_mhz" = "666"
21
Arthur Heymanscdb26fd2021-11-15 20:12:02 +010022 chip cpu/intel/model_206ax
23 device cpu_cluster 0 on end
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -070024
Arthur Heymanscdb26fd2021-11-15 20:12:02 +010025 register "tcc_offset" = "5" # TCC of 95C
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -070026 end
27
28 device domain 0 on
29 subsystemid 0x1ae0 0xc000 inherit
Arthur Heymansb5df65a2022-11-12 14:51:49 +010030 device ref host_bridge on end # host bridge
31 device ref igd on end # vga controller
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -070032
33 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -070034 # GPI routing
35 # 0 No effect (default)
36 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
37 # 2 SCI (if corresponding GPIO_EN bit is also set)
38 register "alt_gp_smi_en" = "0x0002"
39 register "gpi1_routing" = "1"
40 register "gpi6_routing" = "2"
41
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -070042 register "sata_port_map" = "0x3"
Shawn Nematbakhsh7b8952c2013-03-14 11:03:59 -070043 # Set max SATA speed to 3.0 Gb/s
44 register "sata_interface_speed_support" = "0x2"
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -070045
46 # Enable EC Port 0x68/0x6C
47 register "gen1_dec" = "0x00040069"
48
49 # EC range is 0x800-0x9ff
50 register "gen2_dec" = "0x00fc0901"
51
52 # EC range is 0x1610-0x161F
53 register "gen3_dec" = "0x0001C1611"
54
55 # Enable zero-based linear PCIe root port functions
Angel Ponsaf4bd562021-12-28 13:05:56 +010056 register "pcie_port_coalesce" = "true"
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -070057
Arthur Heymansb5df65a2022-11-12 14:51:49 +010058 device ref xhci on end # USB 3.0 Controller
59 device ref mei1 on end # Management Engine Interface 1
60 device ref mei2 off end # Management Engine Interface 2
61 device ref me_ide_r off end # Management Engine IDE-R
62 device ref me_kt off end # Management Engine KT
63 device ref gbe off end # Intel Gigabit Ethernet
64 device ref ehci2 on end # USB2 EHCI #2 (AUO4, BlueTooth)
65 device ref hda on end # High Definition Audio
66 device ref pcie_rp1 on end # PCIe Port #1
67 device ref pcie_rp2 on end # PCIe Port #2 (WLAN)
68 device ref pcie_rp3 on end # PCIe Port #3 (Card Reader)
Angel Pons02396842021-06-05 12:34:23 +020069 register "pcie_aspm[2]" = "0x3"
Arthur Heymansb5df65a2022-11-12 14:51:49 +010070 device ref pcie_rp4 off end # PCIe Port #4
71 device ref pcie_rp5 off end # PCIe Port #5
72 device ref pcie_rp6 on end # PCIe Port #6 (LAN)
73 device ref pcie_rp7 off end # PCIe Port #7
74 device ref pcie_rp8 off end # PCIe Port #8
75 device ref ehci1 on end # USB2 EHCI #1 (Camera, WLAN, WWAN)
76 device ref pci_bridge off end # PCI bridge
77 device ref lpc on
Matt DeVillier3044af72018-08-01 13:05:14 -050078 chip drivers/pc80/tpm
79 device pnp 0c31.0 on end
80 end
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -070081 chip ec/quanta/it8518
82 # 60h/64h KBC
83 device pnp ff.1 on # dummy address
84 end
85 end
86 end # LPC bridge
Arthur Heymansb5df65a2022-11-12 14:51:49 +010087 device ref sata1 on end # SATA Controller 1 (HDD/SSD)
88 device ref smbus on end # SMBus Controller
89 device ref sata2 off end # SATA Controller 2 (MSATA)
90 device ref thermal off end # Thermal
Stefan Reinauerb7ecf6d2013-03-13 17:13:32 -070091 end
92 end
93end