blob: a274a67749402218090a2c1bfb3a882fd103ea8d [file] [log] [blame]
Edward O'Callaghan956c2982014-03-16 17:09:58 +11001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
Edward O'Callaghan956c2982014-03-16 17:09:58 +11004
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
7
8 # Enable Panel as LVDS and configure power delays
Angel Ponsdc0c0812020-09-02 19:17:30 +02009 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110010 register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
11 register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
12 register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
Edward O'Callaghan5fcae802014-07-29 14:42:26 +100013 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
14 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
Edward O'Callaghan5fcae802014-07-29 14:42:26 +100015 register "gpu_cpu_backlight" = "0x1155"
16 register "gpu_pch_backlight" = "0x11551155"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110017
Edward O'Callaghan956c2982014-03-16 17:09:58 +110018 device domain 0 on
Peter Lemenkov2d68cec2019-12-01 12:25:23 +010019 subsystemid 0x17aa 0x21f6 inherit
20
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010021 device pci 00.0 on end # Host bridge
22 device pci 01.0 on end # PCIe bridge for discrete graphics
23 device pci 02.0 on end # Internal graphics VGA controller
Edward O'Callaghan956c2982014-03-16 17:09:58 +110024
Peter Lemenkov98b78ef2019-12-03 22:15:49 +010025 chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
Edward O'Callaghan956c2982014-03-16 17:09:58 +110026 # GPI routing
27 # 0 No effect (default)
28 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
29 # 2 SCI (if corresponding GPIO_EN bit is also set)
30 register "alt_gp_smi_en" = "0x0000"
31 register "gpi1_routing" = "2"
Nicolas Reineckeb0922f02015-02-01 02:53:35 +010032 register "gpi13_routing" = "2"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110033
Edward O'Callaghancf6f9b92014-09-13 06:06:05 +100034 register "sata_port_map" = "0x3f"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110035 # Set max SATA speed to 6.0 Gb/s
36 register "sata_interface_speed_support" = "0x3"
37
38 register "gen1_dec" = "0x7c1601"
39 register "gen2_dec" = "0x0c15e1"
40 register "gen4_dec" = "0x0c06a1"
41
42 # Enable zero-based linear PCIe root port functions
Angel Ponsaf4bd562021-12-28 13:05:56 +010043 register "pcie_port_coalesce" = "true"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110044
Vladimir Serbinenko36fa5b82014-10-28 23:43:20 +010045 register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
46
Nicolas Reineckebcff3bd2015-03-31 01:40:46 +020047 register "xhci_switchable_ports" = "0xf"
48 register "superspeed_capable_ports" = "0xf"
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010049 register "xhci_overcurrent_mapping" = "0x04000201"
Nicolas Reineckebcff3bd2015-03-31 01:40:46 +020050
Peter Lemenkov9364afd2020-02-04 14:53:18 +010051 register "docking_supported" = "1"
52
Patrick Rudolphc670a412017-04-28 17:28:32 +020053 register "spi_uvscc" = "0x2005"
54 register "spi_lvscc" = "0x2005"
55
Edward O'Callaghan956c2982014-03-16 17:09:58 +110056 device pci 14.0 on end # USB 3.0 Controller
57 device pci 16.0 on end # Management Engine Interface 1
58 device pci 16.1 off end # Management Engine Interface 2
59 device pci 16.2 off end # Management Engine IDE-R
60 device pci 16.3 off end # Management Engine KT
Peter Lemenkov2d68cec2019-12-01 12:25:23 +010061 device pci 19.0 on # Intel Gigabit Ethernet
62 subsystemid 0x17aa 0x21f3
63 end
Edward O'Callaghan956c2982014-03-16 17:09:58 +110064 device pci 1a.0 on end # USB2 EHCI #2
65 device pci 1b.0 on end # High Definition Audio
66 device pci 1c.0 on end # PCIe Port #1
67 device pci 1c.1 on end # PCIe Port #2
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010068 device pci 1c.2 on # PCIe Port #3
Patrick Rudolph05216322019-04-12 16:14:27 +020069 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010070 end
Edward O'Callaghan956c2982014-03-16 17:09:58 +110071 device pci 1c.3 off end # PCIe Port #4
72 device pci 1c.4 off end # PCIe Port #5
73 device pci 1c.5 off end # PCIe Port #6
74 device pci 1c.6 off end # PCIe Port #7
75 device pci 1c.7 off end # PCIe Port #8
76 device pci 1d.0 on end # USB2 EHCI #1
77 device pci 1e.0 off end # PCI bridge
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010078 device pci 1f.0 on # PCI-LPC bridge
Edward O'Callaghan956c2982014-03-16 17:09:58 +110079 chip ec/lenovo/pmh7
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010080 device pnp ff.1 on end # dummy
Edward O'Callaghan956c2982014-03-16 17:09:58 +110081 register "backlight_enable" = "0x01"
82 register "dock_event_enable" = "0x01"
83 end
84
Philipp Deppenwiese3d02b9c2015-06-03 23:09:36 +020085 chip drivers/pc80/tpm
86 device pnp 0c31.0 on end
87 end
88
Edward O'Callaghan956c2982014-03-16 17:09:58 +110089 chip ec/lenovo/h8
90 device pnp ff.2 on # dummy
91 io 0x60 = 0x62
92 io 0x62 = 0x66
93 io 0x64 = 0x1600
94 io 0x66 = 0x1604
95 end
96
Edward O'Callaghanfe365ac2014-03-16 17:24:18 +110097 register "config0" = "0xa7"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110098 register "config1" = "0x09"
99 register "config2" = "0xa0"
Edward O'Callaghanfe365ac2014-03-16 17:24:18 +1100100 register "config3" = "0xc2"
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100101
102 register "has_keyboard_backlight" = "1"
103
104 register "beepmask0" = "0x00"
105 register "beepmask1" = "0x86"
106 register "has_power_management_beeps" = "0"
107 register "event2_enable" = "0xff"
108 register "event3_enable" = "0xff"
109 register "event4_enable" = "0xd0"
110 register "event5_enable" = "0xfc"
111 register "event6_enable" = "0x00"
112 register "event7_enable" = "0x01"
113 register "event8_enable" = "0x7b"
114 register "event9_enable" = "0xff"
115 register "eventa_enable" = "0x01"
116 register "eventb_enable" = "0x00"
117 register "eventc_enable" = "0xff"
118 register "eventd_enable" = "0xff"
119 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200120
121 register "has_bdc_detection" = "1"
122 register "bdc_gpio_num" = "54"
123 register "bdc_gpio_lvl" = "0"
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100124 end
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200125 chip drivers/lenovo/hybrid_graphics
126 device pnp ff.f on end # dummy
127
128 register "detect_gpio" = "21"
129
130 register "has_panel_hybrid_gpio" = "1"
131 register "panel_hybrid_gpio" = "52"
132 register "panel_integrated_lvl" = "1"
133
134 register "has_backlight_gpio" = "0"
135 register "has_dgpu_power_gpio" = "0"
136
Evgeny Zinoviev01869122018-08-30 00:23:39 +0300137 register "has_thinker1" = "1"
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200138 end
Peter Lemenkov257cc4f2019-12-03 21:34:07 +0100139 end
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100140 device pci 1f.2 on end # SATA Controller 1
Peter Lemenkov257cc4f2019-12-03 21:34:07 +0100141 device pci 1f.3 on # SMBus
Elyes HAOUASb0f19882018-06-09 11:59:00 +0200142 # eeprom, 8 virtual devices, same chip
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100143 chip drivers/i2c/at24rf08c
144 device i2c 54 on end
145 device i2c 55 on end
146 device i2c 56 on end
147 device i2c 57 on end
148 device i2c 5c on end
149 device i2c 5d on end
150 device i2c 5e on end
151 device i2c 5f on end
152 end
Peter Lemenkov257cc4f2019-12-03 21:34:07 +0100153 end
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100154 device pci 1f.5 off end # SATA Controller 2
155 device pci 1f.6 on end # Thermal
156 end
157 end
158end