blob: 674b0f8c02388bf5e0b257d7de4c945ac2ac4a56 [file] [log] [blame]
Edward O'Callaghan956c2982014-03-16 17:09:58 +11001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
3 register "gfx.ndid" = "3"
4 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
Edward O'Callaghan956c2982014-03-16 17:09:58 +11005
6 # Enable DisplayPort Hotplug with 6ms pulse
7 register "gpu_dp_d_hotplug" = "0x06"
8
9 # Enable Panel as LVDS and configure power delays
10 register "gpu_panel_port_select" = "0" # LVDS
11 register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
12 register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
13 register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
Edward O'Callaghan5fcae802014-07-29 14:42:26 +100014 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
15 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
Vladimir Serbinenkoa71bdc32014-08-30 00:35:39 +020016 register "gfx.use_spread_spectrum_clock" = "1"
Vladimir Serbinenkoa71bdc32014-08-30 00:35:39 +020017 register "gfx.link_frequency_270_mhz" = "1"
Edward O'Callaghan5fcae802014-07-29 14:42:26 +100018 register "gpu_cpu_backlight" = "0x1155"
19 register "gpu_pch_backlight" = "0x11551155"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110020
21 device cpu_cluster 0 on
Edward O'Callaghan956c2982014-03-16 17:09:58 +110022 chip cpu/intel/model_206ax
23 # Magic APIC ID to locate this chip
Arthur Heymans7e6946a2019-01-21 17:55:02 +010024 device lapic 0x0 on end
Arthur Heymansb3f23232019-01-21 17:48:55 +010025 device lapic 0xacac off end
Edward O'Callaghan956c2982014-03-16 17:09:58 +110026
Edward O'Callaghan956c2982014-03-16 17:09:58 +110027 register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
28 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
29 register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
30
31 register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
32 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
33 register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
34 end
35 end
36
Patrick Rudolph266a1f72016-06-09 18:13:34 +020037 register "pci_mmio_size" = "2048"
38
Edward O'Callaghan956c2982014-03-16 17:09:58 +110039 device domain 0 on
Peter Lemenkov2d68cec2019-12-01 12:25:23 +010040 subsystemid 0x17aa 0x21f6 inherit
41
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010042 device pci 00.0 on end # Host bridge
43 device pci 01.0 on end # PCIe bridge for discrete graphics
44 device pci 02.0 on end # Internal graphics VGA controller
Edward O'Callaghan956c2982014-03-16 17:09:58 +110045
46 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Edward O'Callaghan956c2982014-03-16 17:09:58 +110047 # GPI routing
48 # 0 No effect (default)
49 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
50 # 2 SCI (if corresponding GPIO_EN bit is also set)
51 register "alt_gp_smi_en" = "0x0000"
52 register "gpi1_routing" = "2"
Nicolas Reineckeb0922f02015-02-01 02:53:35 +010053 register "gpi13_routing" = "2"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110054
Edward O'Callaghancf6f9b92014-09-13 06:06:05 +100055 register "sata_port_map" = "0x3f"
Edward O'Callaghan956c2982014-03-16 17:09:58 +110056 # Set max SATA speed to 6.0 Gb/s
57 register "sata_interface_speed_support" = "0x3"
58
59 register "gen1_dec" = "0x7c1601"
60 register "gen2_dec" = "0x0c15e1"
61 register "gen4_dec" = "0x0c06a1"
62
63 # Enable zero-based linear PCIe root port functions
64 register "pcie_port_coalesce" = "1"
Vladimir Serbinenko5b044ae2014-10-25 15:20:55 +020065 register "c2_latency" = "101" # c2 not supported
Edward O'Callaghan956c2982014-03-16 17:09:58 +110066
Vladimir Serbinenko36fa5b82014-10-28 23:43:20 +010067 register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
68
Nicolas Reineckebcff3bd2015-03-31 01:40:46 +020069 register "xhci_switchable_ports" = "0xf"
70 register "superspeed_capable_ports" = "0xf"
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010071 register "xhci_overcurrent_mapping" = "0x04000201"
Nicolas Reineckebcff3bd2015-03-31 01:40:46 +020072
Patrick Rudolphc670a412017-04-28 17:28:32 +020073 register "spi_uvscc" = "0x2005"
74 register "spi_lvscc" = "0x2005"
75
Edward O'Callaghan956c2982014-03-16 17:09:58 +110076 device pci 14.0 on end # USB 3.0 Controller
77 device pci 16.0 on end # Management Engine Interface 1
78 device pci 16.1 off end # Management Engine Interface 2
79 device pci 16.2 off end # Management Engine IDE-R
80 device pci 16.3 off end # Management Engine KT
Peter Lemenkov2d68cec2019-12-01 12:25:23 +010081 device pci 19.0 on # Intel Gigabit Ethernet
82 subsystemid 0x17aa 0x21f3
83 end
Edward O'Callaghan956c2982014-03-16 17:09:58 +110084 device pci 1a.0 on end # USB2 EHCI #2
85 device pci 1b.0 on end # High Definition Audio
86 device pci 1c.0 on end # PCIe Port #1
87 device pci 1c.1 on end # PCIe Port #2
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010088 device pci 1c.2 on # PCIe Port #3
Patrick Rudolph05216322019-04-12 16:14:27 +020089 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010090 end
Edward O'Callaghan956c2982014-03-16 17:09:58 +110091 device pci 1c.3 off end # PCIe Port #4
92 device pci 1c.4 off end # PCIe Port #5
93 device pci 1c.5 off end # PCIe Port #6
94 device pci 1c.6 off end # PCIe Port #7
95 device pci 1c.7 off end # PCIe Port #8
96 device pci 1d.0 on end # USB2 EHCI #1
97 device pci 1e.0 off end # PCI bridge
Peter Lemenkov257cc4f2019-12-03 21:34:07 +010098 device pci 1f.0 on # PCI-LPC bridge
Edward O'Callaghan956c2982014-03-16 17:09:58 +110099 chip ec/lenovo/pmh7
Peter Lemenkov257cc4f2019-12-03 21:34:07 +0100100 device pnp ff.1 on end # dummy
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100101 register "backlight_enable" = "0x01"
102 register "dock_event_enable" = "0x01"
103 end
104
Philipp Deppenwiese3d02b9c2015-06-03 23:09:36 +0200105 chip drivers/pc80/tpm
106 device pnp 0c31.0 on end
107 end
108
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100109 chip ec/lenovo/h8
110 device pnp ff.2 on # dummy
111 io 0x60 = 0x62
112 io 0x62 = 0x66
113 io 0x64 = 0x1600
114 io 0x66 = 0x1604
115 end
116
Edward O'Callaghanfe365ac2014-03-16 17:24:18 +1100117 register "config0" = "0xa7"
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100118 register "config1" = "0x09"
119 register "config2" = "0xa0"
Edward O'Callaghanfe365ac2014-03-16 17:24:18 +1100120 register "config3" = "0xc2"
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100121
122 register "has_keyboard_backlight" = "1"
123
124 register "beepmask0" = "0x00"
125 register "beepmask1" = "0x86"
126 register "has_power_management_beeps" = "0"
127 register "event2_enable" = "0xff"
128 register "event3_enable" = "0xff"
129 register "event4_enable" = "0xd0"
130 register "event5_enable" = "0xfc"
131 register "event6_enable" = "0x00"
132 register "event7_enable" = "0x01"
133 register "event8_enable" = "0x7b"
134 register "event9_enable" = "0xff"
135 register "eventa_enable" = "0x01"
136 register "eventb_enable" = "0x00"
137 register "eventc_enable" = "0xff"
138 register "eventd_enable" = "0xff"
139 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200140
141 register "has_bdc_detection" = "1"
142 register "bdc_gpio_num" = "54"
143 register "bdc_gpio_lvl" = "0"
Patrick Rudolph7d7c6312017-08-13 12:51:27 +0200144
145 register "has_wwan_detection" = "1"
146 register "wwan_gpio_num" = "70"
147 register "wwan_gpio_lvl" = "0"
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100148 end
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200149 chip drivers/lenovo/hybrid_graphics
150 device pnp ff.f on end # dummy
151
152 register "detect_gpio" = "21"
153
154 register "has_panel_hybrid_gpio" = "1"
155 register "panel_hybrid_gpio" = "52"
156 register "panel_integrated_lvl" = "1"
157
158 register "has_backlight_gpio" = "0"
159 register "has_dgpu_power_gpio" = "0"
160
Evgeny Zinoviev01869122018-08-30 00:23:39 +0300161 register "has_thinker1" = "1"
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200162 end
Peter Lemenkov257cc4f2019-12-03 21:34:07 +0100163 end
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100164 device pci 1f.2 on end # SATA Controller 1
Peter Lemenkov257cc4f2019-12-03 21:34:07 +0100165 device pci 1f.3 on # SMBus
Elyes HAOUASb0f19882018-06-09 11:59:00 +0200166 # eeprom, 8 virtual devices, same chip
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100167 chip drivers/i2c/at24rf08c
168 device i2c 54 on end
169 device i2c 55 on end
170 device i2c 56 on end
171 device i2c 57 on end
172 device i2c 5c on end
173 device i2c 5d on end
174 device i2c 5e on end
175 device i2c 5f on end
176 end
Peter Lemenkov257cc4f2019-12-03 21:34:07 +0100177 end
Edward O'Callaghan956c2982014-03-16 17:09:58 +1100178 device pci 1f.5 off end # SATA Controller 2
179 device pci 1f.6 on end # Thermal
180 end
181 end
182end