| Bora Guvendik | 67fb347 | 2017-09-13 18:39:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| Lijian Zhao | 1d90093 | 2018-09-25 15:52:03 -0700 | [diff] [blame] | 4 | * Copyright (C) 2017-2018 Intel Corp. |
| Bora Guvendik | 67fb347 | 2017-09-13 18:39:16 -0700 | [diff] [blame] | 5 | * (Written by Bora Guvendik <bora.guvendik@intel.com> for Intel Corp.) |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | |
| Subrata Banik | a072989 | 2018-09-30 01:39:49 +0530 | [diff] [blame] | 18 | #include <intelblocks/itss.h> |
| 19 | #include <intelblocks/pcr.h> |
| 20 | #include <soc/itss.h> |
| 21 | #include <soc/pcr_ids.h> |
| 22 | |
| Bora Guvendik | 67fb347 | 2017-09-13 18:39:16 -0700 | [diff] [blame] | 23 | /* PCI IRQ assignment */ |
| 24 | #include "pci_irqs.asl" |
| Bora Guvendik | 5d11cc9 | 2017-09-25 14:33:17 -0700 | [diff] [blame] | 25 | |
| Bora Guvendik | 5d11cc9 | 2017-09-25 14:33:17 -0700 | [diff] [blame] | 26 | /* PCR access */ |
| Lijian Zhao | 20123a8 | 2018-02-11 17:31:07 -0800 | [diff] [blame] | 27 | #include <soc/intel/common/acpi/pcr.asl> |
| Bora Guvendik | 5d11cc9 | 2017-09-25 14:33:17 -0700 | [diff] [blame] | 28 | |
| Lijian Zhao | 51605e2 | 2018-02-20 14:37:03 -0800 | [diff] [blame] | 29 | /* eMMC, SD Card */ |
| 30 | #include "scs.asl" |
| 31 | |
| Bora Guvendik | 5d11cc9 | 2017-09-25 14:33:17 -0700 | [diff] [blame] | 32 | /* GPIO controller */ |
| praveen hodagatta pranesh | 521e48c | 2018-09-27 00:00:13 +0800 | [diff] [blame] | 33 | #if IS_ENABLED(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H) |
| 34 | #include "gpio_cnp_h.asl" |
| 35 | #else |
| Bora Guvendik | 5d11cc9 | 2017-09-25 14:33:17 -0700 | [diff] [blame] | 36 | #include "gpio.asl" |
| praveen hodagatta pranesh | 521e48c | 2018-09-27 00:00:13 +0800 | [diff] [blame] | 37 | #endif |
| Lijian Zhao | ae56546 | 2017-10-02 19:18:16 -0700 | [diff] [blame] | 38 | |
| 39 | /* LPC 0:1f.0 */ |
| 40 | #include "lpc.asl" |
| 41 | |
| 42 | /* PCH HDA */ |
| 43 | #include "pch_hda.asl" |
| 44 | |
| Subrata Banik | c8a842b | 2018-09-30 01:41:45 +0530 | [diff] [blame] | 45 | /* PCIE Ports */ |
| 46 | #include "pcie.asl" |
| 47 | |
| Lijian Zhao | ae56546 | 2017-10-02 19:18:16 -0700 | [diff] [blame] | 48 | /* Serial IO */ |
| 49 | #include "serialio.asl" |
| 50 | |
| Lijian Zhao | d145c95 | 2018-08-27 11:14:23 -0700 | [diff] [blame] | 51 | /* SMBus 0:1f.4 */ |
| Lijian Zhao | ae56546 | 2017-10-02 19:18:16 -0700 | [diff] [blame] | 52 | #include "smbus.asl" |
| 53 | |
| Jett Rink | 088d2a3 | 2019-02-27 13:58:05 -0700 | [diff] [blame] | 54 | /* ISH 0:13.0 */ |
| 55 | #include "ish.asl" |
| 56 | |
| Lijian Zhao | ae56546 | 2017-10-02 19:18:16 -0700 | [diff] [blame] | 57 | /* USB XHCI 0:14.0 */ |
| 58 | #include "xhci.asl" |
| 59 | |
| 60 | /* PCI _OSC */ |
| 61 | #include <soc/intel/common/acpi/pci_osc.asl> |
| Bora Guvendik | 1b75994b | 2017-11-27 12:14:58 -0800 | [diff] [blame] | 62 | |
| Lijian Zhao | 1d90093 | 2018-09-25 15:52:03 -0700 | [diff] [blame] | 63 | /* GBe 0:1f.6 */ |
| 64 | #include "pch_glan.asl" |