Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 1 | #ifndef CPU_X86_TSC_H |
| 2 | #define CPU_X86_TSC_H |
| 3 | |
Aaron Durbin | a86e81d | 2014-01-27 15:07:26 -0600 | [diff] [blame] | 4 | #include <stdint.h> |
| 5 | |
Martin Roth | 9634547 | 2017-06-24 14:13:53 -0600 | [diff] [blame] | 6 | #if IS_ENABLED(CONFIG_TSC_SYNC_MFENCE) |
Stefan Reinauer | 0db6820 | 2012-08-07 14:44:51 -0700 | [diff] [blame] | 7 | #define TSC_SYNC "mfence\n" |
Martin Roth | 9634547 | 2017-06-24 14:13:53 -0600 | [diff] [blame] | 8 | #elif IS_ENABLED(CONFIG_TSC_SYNC_LFENCE) |
Stefan Reinauer | 0db6820 | 2012-08-07 14:44:51 -0700 | [diff] [blame] | 9 | #define TSC_SYNC "lfence\n" |
| 10 | #else |
| 11 | #define TSC_SYNC |
| 12 | #endif |
| 13 | |
Elyes HAOUAS | 5e2ac2c | 2017-12-20 21:25:12 +0100 | [diff] [blame] | 14 | #define MSR_PLATFORM_INFO 0xce |
| 15 | |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 16 | struct tsc_struct { |
Lee Leahy | 0ca2a06 | 2017-03-06 18:01:04 -0800 | [diff] [blame] | 17 | unsigned int lo; |
| 18 | unsigned int hi; |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 19 | }; |
| 20 | typedef struct tsc_struct tsc_t; |
| 21 | |
Stefan Reinauer | 348a1ba | 2010-03-17 01:51:11 +0000 | [diff] [blame] | 22 | static inline tsc_t rdtsc(void) |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 23 | { |
| 24 | tsc_t res; |
Stefan Reinauer | 0db6820 | 2012-08-07 14:44:51 -0700 | [diff] [blame] | 25 | asm volatile ( |
| 26 | TSC_SYNC |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 27 | "rdtsc" |
| 28 | : "=a" (res.lo), "=d"(res.hi) /* outputs */ |
Stefan Reinauer | 0db6820 | 2012-08-07 14:44:51 -0700 | [diff] [blame] | 29 | ); |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 30 | return res; |
| 31 | } |
| 32 | |
Stefan Reinauer | 35b6bbb | 2010-03-28 21:26:54 +0000 | [diff] [blame] | 33 | #if !defined(__ROMCC__) |
Ronald G. Minnich | 5750fdd | 2013-05-08 17:08:55 +0200 | [diff] [blame] | 34 | /* Simple 32- to 64-bit multiplication. Uses 16-bit words to avoid overflow. |
| 35 | * This code is used to prevent use of libgcc's umoddi3. |
| 36 | */ |
| 37 | static inline void multiply_to_tsc(tsc_t *const tsc, const u32 a, const u32 b) |
| 38 | { |
| 39 | tsc->lo = (a & 0xffff) * (b & 0xffff); |
| 40 | tsc->hi = ((tsc->lo >> 16) |
| 41 | + ((a & 0xffff) * (b >> 16)) |
| 42 | + ((b & 0xffff) * (a >> 16))); |
| 43 | tsc->lo = ((tsc->hi & 0xffff) << 16) | (tsc->lo & 0xffff); |
| 44 | tsc->hi = ((a >> 16) * (b >> 16)) + (tsc->hi >> 16); |
| 45 | } |
| 46 | |
Stefan Reinauer | 35b6bbb | 2010-03-28 21:26:54 +0000 | [diff] [blame] | 47 | /* Too many registers for ROMCC */ |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 48 | static inline unsigned long long rdtscll(void) |
| 49 | { |
| 50 | unsigned long long val; |
Stefan Reinauer | 0db6820 | 2012-08-07 14:44:51 -0700 | [diff] [blame] | 51 | asm volatile ( |
| 52 | TSC_SYNC |
| 53 | "rdtsc" |
| 54 | : "=A" (val) |
| 55 | ); |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 56 | return val; |
| 57 | } |
Stefan Reinauer | 3a6550d | 2013-08-01 13:31:44 -0700 | [diff] [blame] | 58 | |
| 59 | static inline uint64_t tsc_to_uint64(tsc_t tstamp) |
| 60 | { |
Elyes HAOUAS | 8ffd050 | 2016-09-01 19:01:41 +0200 | [diff] [blame] | 61 | return (((uint64_t)tstamp.hi) << 32) + tstamp.lo; |
Stefan Reinauer | 3a6550d | 2013-08-01 13:31:44 -0700 | [diff] [blame] | 62 | } |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 63 | #endif |
| 64 | |
Aaron Durbin | c49014e | 2015-08-30 21:19:55 -0500 | [diff] [blame] | 65 | /* Provided by CPU/chipset code for the TSC rate in MHz. */ |
Aaron Durbin | 8e73b5d | 2013-05-01 15:27:09 -0500 | [diff] [blame] | 66 | unsigned long tsc_freq_mhz(void); |
Aaron Durbin | 8e73b5d | 2013-05-01 15:27:09 -0500 | [diff] [blame] | 67 | |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 68 | #endif /* CPU_X86_TSC_H */ |