Angel Pons | 60ec365 | 2020-04-03 01:22:13 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 2 | |
| 3 | #include <stdint.h> |
| 4 | #include <northbridge/intel/sandybridge/sandybridge.h> |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 5 | #if CONFIG(USE_NATIVE_RAMINIT) |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 6 | #include <northbridge/intel/sandybridge/raminit_native.h> |
| 7 | #else |
| 8 | #include <northbridge/intel/sandybridge/raminit.h> |
| 9 | #endif |
Patrick Rudolph | da9302a | 2019-03-24 17:01:41 +0100 | [diff] [blame] | 10 | #include <southbridge/intel/bd82x6x/pch.h> |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 11 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 12 | #if !CONFIG(USE_NATIVE_RAMINIT) |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 13 | void mainboard_fill_pei_data(struct pei_data *pei_data) |
| 14 | { |
| 15 | struct pei_data pei_data_template = { |
| 16 | .pei_version = PEI_VERSION, |
| 17 | .mchbar = (uintptr_t)DEFAULT_MCHBAR, |
| 18 | .dmibar = (uintptr_t)DEFAULT_DMIBAR, |
| 19 | .epbar = DEFAULT_EPBAR, |
| 20 | .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, |
Angel Pons | b21bffa | 2020-07-03 01:02:28 +0200 | [diff] [blame^] | 21 | .smbusbar = CONFIG_FIXED_SMBUS_IO_BASE, |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 22 | .wdbbar = 0x4000000, |
| 23 | .wdbsize = 0x1000, |
| 24 | .hpet_address = CONFIG_HPET_ADDRESS, |
| 25 | .rcba = (uintptr_t)DEFAULT_RCBABASE, |
| 26 | .pmbase = DEFAULT_PMBASE, |
| 27 | .gpiobase = DEFAULT_GPIOBASE, |
| 28 | .thermalbase = 0xfed08000, |
| 29 | .system_type = 0, // 0 Mobile, 1 Desktop/Server |
| 30 | .tseg_size = CONFIG_SMM_TSEG_SIZE, |
| 31 | .spd_addresses = { 0xa0, 0x00, 0xa2, 0x00 }, |
| 32 | .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, |
| 33 | .ec_present = 0, |
| 34 | .gbe_enable = 1, |
| 35 | // 0 = leave channel enabled |
| 36 | // 1 = disable dimm 0 on channel |
| 37 | // 2 = disable dimm 1 on channel |
| 38 | // 3 = disable dimm 0+1 on channel |
| 39 | .dimm_channel0_disabled = 2, |
| 40 | .dimm_channel1_disabled = 2, |
| 41 | .max_ddr3_freq = 1333, |
| 42 | .usb_port_config = { |
| 43 | #define USB_CONFIG(enabled, current, ocpin) { enabled, ocpin, 0x040 * current } |
| 44 | #include "usb.h" |
| 45 | }, |
| 46 | }; |
| 47 | *pei_data = pei_data_template; |
| 48 | } |
| 49 | |
| 50 | int mainboard_should_reset_usb(int s3resume) |
| 51 | { |
| 52 | return !s3resume; |
| 53 | } |
| 54 | #endif |