Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Alexandru Gagniuc | ecf2eb4 | 2015-09-28 21:39:12 -0700 | [diff] [blame] | 2 | |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 3 | #include <device/pci_ops.h> |
Alexandru Gagniuc | ecf2eb4 | 2015-09-28 21:39:12 -0700 | [diff] [blame] | 4 | #include <device/pci_def.h> |
| 5 | #include "pch.h" |
| 6 | |
| 7 | #define PCH_EHCI1_TEMP_BAR0 0xe8000000 |
| 8 | #define PCH_EHCI2_TEMP_BAR0 0xe8000400 |
| 9 | |
| 10 | /* |
| 11 | * Setup USB controller MMIO BAR to prevent the |
| 12 | * reference code from resetting the controller. |
| 13 | * |
| 14 | * The BAR will be re-assigned during device |
| 15 | * enumeration so these are only temporary. |
| 16 | */ |
| 17 | void enable_usb_bar(void) |
| 18 | { |
Elyes HAOUAS | 68c851b | 2018-06-12 22:06:09 +0200 | [diff] [blame] | 19 | pci_devfn_t usb0 = PCH_EHCI1_DEV; |
| 20 | pci_devfn_t usb1 = PCH_EHCI2_DEV; |
Alexandru Gagniuc | ecf2eb4 | 2015-09-28 21:39:12 -0700 | [diff] [blame] | 21 | |
| 22 | /* USB Controller 1 */ |
| 23 | pci_write_config32(usb0, PCI_BASE_ADDRESS_0, |
| 24 | PCH_EHCI1_TEMP_BAR0); |
Elyes HAOUAS | 729c069 | 2020-04-28 19:50:44 +0200 | [diff] [blame] | 25 | pci_or_config16(usb0, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); |
Alexandru Gagniuc | ecf2eb4 | 2015-09-28 21:39:12 -0700 | [diff] [blame] | 26 | |
| 27 | /* USB Controller 2 */ |
| 28 | pci_write_config32(usb1, PCI_BASE_ADDRESS_0, |
| 29 | PCH_EHCI2_TEMP_BAR0); |
Elyes HAOUAS | 729c069 | 2020-04-28 19:50:44 +0200 | [diff] [blame] | 30 | pci_or_config16(usb1, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); |
Alexandru Gagniuc | ecf2eb4 | 2015-09-28 21:39:12 -0700 | [diff] [blame] | 31 | } |