blob: cdff9ceacc7727c65b5d6ecea5eb67bcf8f62f84 [file] [log] [blame]
Lee Leahyc4210412015-06-29 11:37:56 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Google Inc.
5 * Copyright (C) 2015 Intel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Lee Leahyc4210412015-06-29 11:37:56 -070015 */
16
Duncan Laurie74b964e2015-09-04 10:41:02 -070017#ifndef MAINBOARD_SPD_H
18#define MAINBOARD_SPD_H
Lee Leahyc4210412015-06-29 11:37:56 -070019
20#define SPD_LEN 256
21
22#define SPD_DRAM_TYPE 2
23#define SPD_DRAM_DDR3 0x0b
24#define SPD_DRAM_LPDDR3 0xf1
25#define SPD_DENSITY_BANKS 4
26#define SPD_ADDRESSING 5
27#define SPD_ORGANIZATION 7
28#define SPD_BUS_DEV_WIDTH 8
29#define SPD_PART_OFF 128
30#define SPD_PART_LEN 18
Duncan Laurie74b964e2015-09-04 10:41:02 -070031#define SPD_MANU_OFF 148
Lee Leahyc4210412015-06-29 11:37:56 -070032
Brandon Breitensteinad77bf92015-10-27 13:49:14 -070033#define HYNIX_SINGLE_CHAN 0x1
34#define SAMSUNG_SINGLE_CHAN 0x4
35#define MIC_SINGLE_CHAN 0x5
Duncan Laurie74b964e2015-09-04 10:41:02 -070036#endif