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Lee Leahyc4210412015-06-29 11:37:56 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Google Inc.
5 * Copyright (C) 2015 Intel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#ifndef _MAINBOARD_SPD_H_
22#define _MAINBOARD_SPD_H_
23
24#define SPD_LEN 256
25
26#define SPD_DRAM_TYPE 2
27#define SPD_DRAM_DDR3 0x0b
28#define SPD_DRAM_LPDDR3 0xf1
29#define SPD_DENSITY_BANKS 4
30#define SPD_ADDRESSING 5
31#define SPD_ORGANIZATION 7
32#define SPD_BUS_DEV_WIDTH 8
33#define SPD_PART_OFF 128
34#define SPD_PART_LEN 18
35
36
37#endif /* _MAINBOARD_SPD_H_ */