Blame - src/soc/intel/common/Kconfig.common - coreboot

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Stefan Reinauer	9616f3c	2015-04-29 10:45:22 -0700	[diff] [blame]	1	config SOC_INTEL_COMMON
				2	bool
Angel Pons	61dd836	2020-12-05 18:02:32 +0100	[diff] [blame]	3	select AZALIA_PLUGIN_SUPPORT
Kyösti Mälkki	3139c8d	2020-06-28 16:33:33 +0300	[diff] [blame]	4	select ACPI_SOC_NVS
Stefan Reinauer	9616f3c	2015-04-29 10:45:22 -0700	[diff] [blame]	5	help
				6	common code for Intel SOCs
				7
Lee Leahy	0946ec3	2015-04-20 15:24:54 -0700	[diff] [blame]	8	if SOC_INTEL_COMMON
				9
Subrata Banik	0180e43	2020-09-18 14:42:03 +0530	[diff] [blame]	10	comment "Intel SoC Common Code for IP blocks"
Subrata Banik	9a0245a	2017-02-22 14:22:44 +0530	[diff] [blame]	11	source "src/soc/intel/common/block/Kconfig"
				12
Subrata Banik	19cd07f	2018-05-17 13:53:29 +0530	[diff] [blame]	13	comment "Intel SoC Common PCH Code"
				14	source "src/soc/intel/common/pch/Kconfig"
				15
Subrata Banik	0180e43	2020-09-18 14:42:03 +0530	[diff] [blame]	16	comment "Intel SoC Common coreboot stages and non-IP blocks"
Subrata Banik	90d3b2b	2018-04-19 10:23:30 +0530	[diff] [blame]	17	source "src/soc/intel/common/basecode/Kconfig"
				18
Lee Leahy	14ecb54	2015-02-09 21:16:14 -0800	[diff] [blame]	19	config SOC_INTEL_COMMON_RESET
				20	bool
				21	default n
Patrick Rudolph	f677d17	2018-10-01 19:17:11 +0200	[diff] [blame]	22	select HAVE_CF9_RESET
Lee Leahy	0946ec3	2015-04-20 15:24:54 -0700	[diff] [blame]	23
Duncan Laurie	63ebc80	2015-09-08 16:09:28 -0700	[diff] [blame]	24	config SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
				25	bool
				26	default n
				27
Subrata Banik	c1645fa	2016-08-05 18:25:55 +0530	[diff] [blame]	28	config ACPI_CONSOLE
				29	bool
				30	default n
				31	help
				32	Provide a mechanism for serial console based ACPI debug.
				33
Benjamin Doron	bbb8123	2020-06-28 02:43:53 +0000	[diff] [blame]	34	config PAVP
				35	bool "Enable PAVP (Protected Audio-Video Path) support"
				36	default y
				37	help
				38	Protected Audio-Video Path is an Intel technology used to enforce digital
				39	rights protections on multimedia content. Streaming or other media playback
				40	services may require it to be enabled for correct functioning.
				41
				42	Users might disable PAVP if the concept of digital rights management (DRM)
				43	offends them, or if they have concerns about the security of
				44	the Management Engine, which is where this technology is implemented.
				45
				46	Set this option to n to disable support.
				47
Pratik Prajapati	b90b94d	2015-09-11 13:51:38 -0700	[diff] [blame]	48	config MMA
Pratik Prajapati	ffc934d	2016-11-18 14:36:34 -0800	[diff] [blame]	49	bool "Enable MMA (Memory Margin Analysis) support for Intel Core"
Martin Roth	dde96fb	2015-11-25 22:33:20 -0700	[diff] [blame]	50	default n
Pratik Prajapati	ebb7994	2017-04-10 15:47:09 -0700	[diff] [blame]	51	depends on SOC_INTEL_KABYLAKE \|\| SOC_INTEL_SKYLAKE
Martin Roth	dde96fb	2015-11-25 22:33:20 -0700	[diff] [blame]	52	help
Pratik Prajapati	ffc934d	2016-11-18 14:36:34 -0800	[diff] [blame]	53	Set this option to y to enable MMA (Memory Margin Analysis) support
Pratik Prajapati	b90b94d	2015-09-11 13:51:38 -0700	[diff] [blame]	54
				55	config MMA_BLOBS_PATH
Martin Roth	dde96fb	2015-11-25 22:33:20 -0700	[diff] [blame]	56	string "Path to MMA blobs"
				57	depends on MMA
Pratik Prajapati	ebb7994	2017-04-10 15:47:09 -0700	[diff] [blame]	58	default "3rdparty/blobs/soc/intel/kabylake/mma-blobs" if SOC_INTEL_KABYLAKE
				59	default "3rdparty/blobs/soc/intel/skylake/mma-blobs" if SOC_INTEL_SKYLAKE
Pratik Prajapati	b90b94d	2015-09-11 13:51:38 -0700	[diff] [blame]	60
Aaron Durbin	c14a1a9	2016-06-28 15:41:07 -0500	[diff] [blame]	61	config SOC_INTEL_COMMON_NHLT
				62	bool
				63	default n
				64
Aaron Durbin	9d9a121	2017-04-19 10:02:27 -0500	[diff] [blame]	65	config TPM_TIS_ACPI_INTERRUPT
				66	int
				67	help
				68	acpi_get_gpe() is used to provide interrupt status to TPM layer.
				69	This option specifies the GPE number.
				70
Kane Chen	f5e8b29	2019-04-17 10:42:00 +0800	[diff] [blame]	71	config SOC_INTEL_DEBUG_CONSENT
				72	bool "Enable SOC debug interface"
				73	default n
				74	help
				75	Set this option to enable default debug interface of SoC such as DBC
				76	or DCI.
				77
Kane Chen	7b2a889	2019-07-03 10:24:15 +0800	[diff] [blame]	78	config SMM_MODULE_STACK_SIZE
				79	hex
				80	default 0x800
				81
Curtis Chen	b89c798	2021-12-07 18:01:57 +0800	[diff] [blame]	82	config SOC_INTEL_CRASHLOG
				83	def_bool n
				84	select SOC_INTEL_COMMON_BLOCK_CRASHLOG
				85	select ACPI_BERT
				86	help
				87	Enables Crashlog.
				88
				89	config SOC_INTEL_CRASHLOG_ON_RESET
				90	def_bool n
				91	help
				92	Enables the PMC to collect crashlog records on every reset event. NOTE:
				93	This will result in a BERT table being populated containing a PMC
				94	crashlog record on every boot.
				95
Lee Leahy	0946ec3	2015-04-20 15:24:54 -0700	[diff] [blame]	96	endif # SOC_INTEL_COMMON