blob: 8eef1538cc4b1dfcded095b17817e4510eb2f3ff [file] [log] [blame]
Felix Held4a8cd722020-04-18 22:26:39 +02001# SPDX-License-Identifier: BSD-3-Clause
Felix Held4a8cd722020-04-18 22:26:39 +02002
Martin Roth1f337622019-04-22 16:08:31 -06003ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
Martin Roth5c354b92019-04-22 14:55:16 -06004
Martin Rothc7acf162020-05-28 00:44:50 -06005subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
Kangheui Wone20bc462021-04-06 16:55:48 +10006subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage
Martin Roth5c354b92019-04-22 14:55:16 -06007
Felix Helde7a02022020-12-10 02:05:47 +01008# Beware that all-y also adds the compilation unit to verstage on PSP
Felix Held1a341af2020-12-05 01:18:10 +01009all-y += config.c
Felix Held40744592020-12-09 16:12:41 +010010all-y += aoac.c
Felix Held1a341af2020-12-05 01:18:10 +010011
Felix Held0aada3c2020-11-24 22:55:53 +010012bootblock-y += bootblock.c
Felix Held187f59a2020-12-08 02:25:05 +010013bootblock-y += early_fch.c
Felix Held46673222020-04-04 02:37:04 +020014bootblock-y += gpio.c
Felix Heldaefcab72021-07-19 15:13:40 +020015bootblock-y += i2c.c
Martin Roth50cca762020-08-13 11:06:18 -060016bootblock-y += reset.c
Felix Heldaefcab72021-07-19 15:13:40 +020017bootblock-y += uart.c
Felix Held46673222020-04-04 02:37:04 +020018
Felix Helddd737142021-03-26 00:44:35 +010019romstage-y += fsp_m_params.c
Martin Roth5c354b92019-04-22 14:55:16 -060020romstage-y += gpio.c
Felix Heldaefcab72021-07-19 15:13:40 +020021romstage-y += i2c.c
Martin Rothc7acf162020-05-28 00:44:50 -060022romstage-y += reset.c
Felix Heldaefcab72021-07-19 15:13:40 +020023romstage-y += romstage.c
Furquan Shaikhca481ee2020-06-13 00:16:26 -070024romstage-y += uart.c
Martin Roth5c354b92019-04-22 14:55:16 -060025
Martin Roth5c354b92019-04-22 14:55:16 -060026verstage-y += i2c.c
Martin Rothc7acf162020-05-28 00:44:50 -060027verstage_x86-y += gpio.c
Martin Rothc7acf162020-05-28 00:44:50 -060028verstage_x86-y += reset.c
Felix Heldaefcab72021-07-19 15:13:40 +020029verstage_x86-y += uart.c
Martin Roth5c354b92019-04-22 14:55:16 -060030
Felix Heldaefcab72021-07-19 15:13:40 +020031ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
32ramstage-$(CONFIG_HAVE_ACPI_TABLES) += agesa_acpi.c
Martin Roth5c354b92019-04-22 14:55:16 -060033ramstage-y += chip.c
34ramstage-y += cpu.c
Furquan Shaikh0c707d42020-07-08 16:54:40 -070035ramstage-y += data_fabric.c
Felix Held187f59a2020-12-08 02:25:05 +010036ramstage-y += fch.c
Felix Held793f3712021-03-26 00:13:51 +010037ramstage-y += fsp_s_params.c
Felix Heldaefcab72021-07-19 15:13:40 +020038ramstage-y += gpio.c
Martin Roth86ba0d72020-02-05 16:46:30 -070039ramstage-y += graphics.c
Felix Heldaefcab72021-07-19 15:13:40 +020040ramstage-y += i2c.c
41ramstage-y += mca.c
Furquan Shaikhcff479e2020-07-08 15:47:19 -070042ramstage-y += pcie_gpp.c
Felix Heldaefcab72021-07-19 15:13:40 +020043ramstage-y += reset.c
44ramstage-y += root_complex.c
45ramstage-y += sata.c
46ramstage-y += soc_util.c
47ramstage-y += uart.c
Raul E Rangel0357ab72020-07-09 12:08:58 -060048ramstage-y += xhci.c
Martin Roth5c354b92019-04-22 14:55:16 -060049
Martin Roth5c354b92019-04-22 14:55:16 -060050smm-y += smihandler.c
Felix Held9412b3e2020-06-18 15:54:43 +020051ifeq ($(CONFIG_DEBUG_SMI),y)
52smm-y += uart.c
Felix Held9412b3e2020-06-18 15:54:43 +020053endif
Martin Roth5c354b92019-04-22 14:55:16 -060054smm-y += gpio.c
Marshall Dawson5c5049e2020-04-23 06:43:44 -060055smm-y += smu.c
Martin Roth5c354b92019-04-22 14:55:16 -060056
Martin Rothd7e3ead2019-04-22 16:32:58 -060057CPPFLAGS_common += -I$(src)/soc/amd/picasso/include
58CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi
Marshall Dawson00a22082020-01-20 23:05:31 -070059CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso
Martin Roth0f3ef702020-10-06 18:11:12 -060060CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include
Martin Roth5c354b92019-04-22 14:55:16 -060061
Raul E Rangelcbaa8352020-05-13 14:01:09 -060062MAINBOARD_BLOBS_DIR:=$(top)/3rdparty/blobs/mainboard/$(MAINBOARDDIR)
63
Martin Roth5c354b92019-04-22 14:55:16 -060064# ROMSIG Normally At ROMBASE + 0x20000
65# Overridden by CONFIG_AMD_FWM_POSITION_INDEX
66# +-----------+---------------+----------------+------------+
Marshall Dawson62611412019-06-19 11:46:06 -060067# |0x55AA55AA | | | |
Martin Roth5c354b92019-04-22 14:55:16 -060068# +-----------+---------------+----------------+------------+
Marshall Dawson62611412019-06-19 11:46:06 -060069# | | PSPDIR ADDR | BIOSDIR ADDR |
70# +-----------+---------------+----------------+
71
Zheng Bao8516c212021-01-23 10:09:00 +080072$(if $(CONFIG_AMD_FWM_POSITION_INDEX), ,\
73 $(error Invalid AMD firmware position index. Check if the board sets a valid ROM size))
74
Marshall Dawsonbc4c9032019-06-11 12:18:20 -060075PICASSO_FWM_POSITION=$(call int-add, \
Martin Roth5c354b92019-04-22 14:55:16 -060076 $(call int-subtract, 0xffffffff \
77 $(call int-shift-left, \
78 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
79
Robert Ziebab26d0052022-01-24 16:37:47 -070080# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
81# Building the cbfs image will fail if the offset isn't large enough
82AMD_FW_AB_POSITION := 0x40
83
84PICASSO_FW_A_POSITION=$(call int-add, \
85 $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_A_START" {print $$3}' $(obj)/fmap_config.h) \
86 $(AMD_FW_AB_POSITION))
87
88PICASSO_FW_B_POSITION=$(call int-add, \
89 $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_B_START" {print $$3}' $(obj)/fmap_config.h) \
90 $(AMD_FW_AB_POSITION))
91
Marshall Dawson62611412019-06-19 11:46:06 -060092#
93# PSP Directory Table items
94#
95# Certain ordering requirements apply, however these are ensured by amdfwtool.
96# For more information see "AMD Platform Security Processor BIOS Architecture
97# Design Guide for AMD Family 17h Processors" (PID #55758, NDA only).
98#
99
Zheng Bao3384e4a2020-10-06 12:03:11 +0800100FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}')
Martin Roth5c354b92019-04-22 14:55:16 -0600101
Furquan Shaikh577db022020-04-24 15:52:04 -0700102ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y)
Furquan Shaikh318e5832020-04-24 14:04:07 -0700103# Enable secure debug unlock
104PSP_SOFTFUSE_BITS += 0
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800105OPT_TOKEN_UNLOCK="--token-unlock"
Furquan Shaikh577db022020-04-24 15:52:04 -0700106endif
Martin Roth5c354b92019-04-22 14:55:16 -0600107
Marshall Dawson62611412019-06-19 11:46:06 -0600108ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y)
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800109OPT_PSP_LOAD_MP2_FW="--load-mp2-fw"
Marshall Dawson62611412019-06-19 11:46:06 -0600110else
Furquan Shaikh318e5832020-04-24 14:04:07 -0700111# Disable MP2 firmware loading
112PSP_SOFTFUSE_BITS += 29
Martin Roth5c354b92019-04-22 14:55:16 -0600113endif
114
Martin Rothfdad5ad2021-04-16 11:36:01 -0600115# Use additional Soft Fuse bits specified in Kconfig
Zheng Bao17022bb2021-05-13 22:38:05 +0800116PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS))
Martin Rothfdad5ad2021-04-16 11:36:01 -0600117
Marshall Dawson62611412019-06-19 11:46:06 -0600118ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y)
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800119OPT_PSP_LOAD_S0I3_FW="--load-s0i3"
Marshall Dawson62611412019-06-19 11:46:06 -0600120endif
121
Marshall Dawson62611412019-06-19 11:46:06 -0600122# type = 0x3a
123ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
124PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
125endif
Marshall Dawson62611412019-06-19 11:46:06 -0600126#
127# BIOS Directory Table items - proper ordering is managed by amdfwtool
128#
129
130# type = 0x60
Rob Barnesb2545cc2020-09-09 13:19:09 -0600131PSP_APCB_FILES=$(APCB_SOURCES)
Marshall Dawson62611412019-06-19 11:46:06 -0600132
133# type = 0x61
Marshall Dawsonb7687232020-01-20 19:56:30 -0700134PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS)
Marshall Dawson62611412019-06-19 11:46:06 -0600135
136# type = 0x62
137PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img
Felix Held46673222020-04-04 02:37:04 +0200138PSP_ELF_FILE=$(objcbfs)/bootblock.elf
Zheng Bao944d00b2020-08-17 11:11:48 +0800139PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}')
140PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
Marshall Dawsonb7687232020-01-20 19:56:30 -0700141# type = 0x63 - construct APOB NV base/size from flash map
Felix Held77a63ef2020-09-22 01:23:54 +0200142# The flashmap section used for this is expected to be named RW_MRC_CACHE
Felix Held8ea26ae2021-03-08 16:42:11 +0100143APOB_NV_SIZE=$(shell awk '$$2 == "FMAP_SECTION_RW_MRC_CACHE_SIZE" {print $$3}' $(obj)/fmap_config.h)
144APOB_NV_BASE=$(shell awk '$$2 == "FMAP_SECTION_RW_MRC_CACHE_START" {print $$3}' $(obj)/fmap_config.h)
Marshall Dawson62611412019-06-19 11:46:06 -0600145
Martin Roth362eaf32020-06-14 10:38:32 -0600146ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
147# type = 0x6B - PSP Shared memory location
148ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0)
149PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE)
Raul E Rangel42c5b012021-03-05 11:17:13 -0700150PSP_SHAREDMEM_BASE=$(shell awk '$$3 == "_psp_sharedmem_dram" {printf "0x" $$1}' $(objcbfs)/bootblock.map)
Martin Roth362eaf32020-06-14 10:38:32 -0600151endif
152
153# type = 0x52 - PSP Bootloader Userspace Application (verstage)
Martin Rothde498332020-09-01 11:00:28 -0600154PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE))
Martin Rothfe87d762020-09-01 11:04:21 -0600155PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN))
Martin Roth362eaf32020-06-14 10:38:32 -0600156endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK
157
Furquan Shaikh318e5832020-04-24 14:04:07 -0700158
159# Helper function to return a value with given bit set
Martin Rothfdad5ad2021-04-16 11:36:01 -0600160# Soft Fuse type = 0xb - See #55758 (NDA) for bit definitions.
Furquan Shaikh318e5832020-04-24 14:04:07 -0700161set-bit=$(call int-shift-left, 1 $(call _toint,$1))
162PSP_SOFTFUSE=$(shell A=$(call int-add, \
163 $(foreach bit,$(PSP_SOFTFUSE_BITS),$(call set-bit,$(bit)))); printf "0x%x" $$A)
164
Marshall Dawson62611412019-06-19 11:46:06 -0600165#
166# Build the arguments to amdfwtool (order is unimportant). Missing file names
167# result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool.
168#
169
Martin Roth5c354b92019-04-22 14:55:16 -0600170add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
171
Martin Roth362eaf32020-06-14 10:38:32 -0600172OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage)
Martin Rothfe87d762020-09-01 11:04:21 -0600173OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
Marshall Dawson62611412019-06-19 11:46:06 -0600174
Raul E Rangelcbaa8352020-05-13 14:01:09 -0600175OPT_PSP_APCB_FILES=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \
176 $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \
Zheng Bao5caca942020-12-04 16:39:38 +0800177 --instance $(shell printf "%x" $$(($(i)-1))) --apcb ) )
178OPT_PSP_APCB_FILES_BK=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \
179 $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \
180 --instance $(shell printf "1%x" $$(($(i)-1))) --apcb ) )
Raul E Rangelcbaa8352020-05-13 14:01:09 -0600181
Marshall Dawson62611412019-06-19 11:46:06 -0600182OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base)
183OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin)
184OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest)
185OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size)
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800186
Martin Roth362eaf32020-06-14 10:38:32 -0600187OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem)
188OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size)
Martin Roth6e5f9092020-06-25 17:31:54 -0600189OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size)
190OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base)
Matt Papageorge95c42c32020-07-08 11:33:48 -0500191OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode)
192OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed)
193OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag)
Martin Roth5c354b92019-04-22 14:55:16 -0600194
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800195OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
196
Martin Rothe2d0ba02020-07-29 16:37:57 -0600197ifeq ($(CONFIG_VBOOT),)
198OPT_APOB0_NV_SIZE=$(OPT_APOB_NV_SIZE)
199OPT_APOB0_NV_BASE=$(OPT_APOB_NV_BASE)
200endif
201
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800202OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
203
204# Add all the files listed in the config file
Zheng Baoaf2efbb2020-11-05 18:26:10 +0800205POUND_SIGN=$(call strip_quotes, "\#")
206DEP_FILES= $(patsubst %,$(FIRMWARE_LOCATION)/%, $(shell sed -e /^$(POUND_SIGN)/d -e /^FIRMWARE_LOCATION/d $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}' ))
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800207
208AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \
Zheng Bao5caca942020-12-04 16:39:38 +0800209 $(OPT_PSP_APCB_FILES_BK) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600210 $(OPT_APOB_ADDR) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600211 $(OPT_PSP_BIOSBIN_FILE) \
212 $(OPT_PSP_BIOSBIN_DEST) \
213 $(OPT_PSP_BIOSBIN_SIZE) \
214 $(OPT_PSP_SOFTFUSE) \
Felix Heldb03dc9c2021-02-12 21:59:47 +0100215 --use-pspsecureos \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800216 $(OPT_PSP_LOAD_MP2_FW) \
217 $(OPT_PSP_LOAD_S0I3_FW) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600218 $(OPT_WHITELIST_FILE) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600219 $(OPT_PSP_SHAREDMEM_BASE) \
220 $(OPT_PSP_SHAREDMEM_SIZE) \
221 --combo-capable \
222 $(OPT_TOKEN_UNLOCK) \
Matt Papageorge95c42c32020-07-08 11:33:48 -0500223 $(OPT_EFS_SPI_READ_MODE) \
224 $(OPT_EFS_SPI_SPEED) \
225 $(OPT_EFS_SPI_MICRON_FLAG) \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800226 --config $(CONFIG_AMDFW_CONFIG_FILE) \
Matt Papageorge95c42c32020-07-08 11:33:48 -0500227 --soc-name "Picasso" \
Martin Roth9aa8d112020-06-04 21:31:41 -0600228 --flashsize $(CONFIG_ROM_SIZE)
229
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800230$(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
Martin Roth362eaf32020-06-14 10:38:32 -0600231 $(PSP_VERSTAGE_FILE) \
Martin Rothfe87d762020-09-01 11:04:21 -0600232 $(PSP_VERSTAGE_SIG_FILE) \
Raul E Rangelcbaa8352020-05-13 14:01:09 -0600233 $$(PSP_APCB_FILES) \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800234 $(DEP_FILES) \
Marshall Dawsonb7687232020-01-20 19:56:30 -0700235 $(AMDFWTOOL) \
Raul E Rangel42c5b012021-03-05 11:17:13 -0700236 $(obj)/fmap_config.h \
237 $(objcbfs)/bootblock.elf # this target also creates the .map file
Rob Barnesb2545cc2020-09-09 13:19:09 -0600238 $(if $(PSP_APCB_FILES), ,$(error APCB_SOURCES is not set))
Martin Roth5c354b92019-04-22 14:55:16 -0600239 rm -f $@
240 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
241 $(AMDFWTOOL) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600242 $(AMDFW_COMMON_ARGS) \
Martin Rothe2d0ba02020-07-29 16:37:57 -0600243 $(OPT_APOB0_NV_SIZE) \
244 $(OPT_APOB0_NV_BASE) \
Martin Roth7c4956d2020-09-01 11:05:53 -0600245 $(OPT_VERSTAGE_FILE) \
Martin Rothfe87d762020-09-01 11:04:21 -0600246 $(OPT_VERSTAGE_SIG_FILE) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600247 --location $(shell printf "%#x" $(PICASSO_FWM_POSITION)) \
248 --output $@
Martin Roth5c354b92019-04-22 14:55:16 -0600249
Felix Held46673222020-04-04 02:37:04 +0200250$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
Marshall Dawson62611412019-06-19 11:46:06 -0600251 rm -f $@
252 @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n"
Felix Held46673222020-04-04 02:37:04 +0200253 $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
Marshall Dawson62611412019-06-19 11:46:06 -0600254 --maxsize $(PSP_BIOSBIN_SIZE)
255
Martin Roth9aa8d112020-06-04 21:31:41 -0600256$(obj)/amdfw_a.rom: $(obj)/amdfw.rom
257 rm -f $@
258 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
259 $(AMDFWTOOL) \
260 $(AMDFW_COMMON_ARGS) \
Martin Rothe2d0ba02020-07-29 16:37:57 -0600261 $(OPT_APOB_NV_SIZE) \
262 $(OPT_APOB_NV_BASE) \
Robert Ziebab26d0052022-01-24 16:37:47 -0700263 --location $(shell printf "%#x" $(PICASSO_FW_A_POSITION)) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600264 --anywhere \
265 --output $@
266
267$(obj)/amdfw_b.rom: $(obj)/amdfw.rom
268 rm -f $@
269 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
270 $(AMDFWTOOL) \
271 $(AMDFW_COMMON_ARGS) \
Martin Rothe2d0ba02020-07-29 16:37:57 -0600272 $(OPT_APOB_NV_SIZE) \
273 $(OPT_APOB_NV_BASE) \
Robert Ziebab26d0052022-01-24 16:37:47 -0700274 --location $(shell printf "%#x" $(PICASSO_FW_B_POSITION)) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600275 --anywhere \
276 --output $@
277
Martin Roth5c354b92019-04-22 14:55:16 -0600278cbfs-files-y += apu/amdfw
279apu/amdfw-file := $(obj)/amdfw.rom
Marshall Dawsonbc4c9032019-06-11 12:18:20 -0600280apu/amdfw-position := $(PICASSO_FWM_POSITION)
Martin Roth5c354b92019-04-22 14:55:16 -0600281apu/amdfw-type := raw
282
Martin Roth9aa8d112020-06-04 21:31:41 -0600283ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
284cbfs-files-y += apu/amdfw_a
285apu/amdfw_a-file := $(obj)/amdfw_a.rom
Robert Ziebab26d0052022-01-24 16:37:47 -0700286apu/amdfw_a-position := $(AMD_FW_AB_POSITION)
Martin Roth9aa8d112020-06-04 21:31:41 -0600287apu/amdfw_a-type := raw
288
289cbfs-files-y += apu/amdfw_b
290apu/amdfw_b-file := $(obj)/amdfw_b.rom
Robert Ziebab26d0052022-01-24 16:37:47 -0700291apu/amdfw_b-position := $(AMD_FW_AB_POSITION)
Martin Roth9aa8d112020-06-04 21:31:41 -0600292apu/amdfw_b-type := raw
293endif
294
Zheng Bao13d6a462021-01-20 11:05:38 +0800295cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
Zheng Bao6ba591b2020-06-09 09:47:06 +0800296
Martin Roth1f337622019-04-22 16:08:31 -0600297endif # ($(CONFIG_SOC_AMD_PICASSO),y)