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Angel Pons163030b2020-04-05 13:22:07 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Gabe Blackd40be112013-10-09 23:45:07 -07002
Julius Wernerf0d21ff32014-10-20 13:24:14 -07003#include <boardid.h>
Tom Warrenbb932c52014-04-30 14:51:38 -07004#include <console/console.h>
Gabe Blackd40be112013-10-09 23:45:07 -07005#include <delay.h>
Nico Huber0f2dd1e2017-08-01 14:02:40 +02006#include <device/i2c_simple.h>
Gabe Blackd40be112013-10-09 23:45:07 -07007#include <stdint.h>
Daisuke Nojiri512bfbc2014-08-15 17:07:39 -07008#include <reset.h>
Gabe Blackd40be112013-10-09 23:45:07 -07009
Julius Wernerf0d21ff32014-10-20 13:24:14 -070010#include "pmic.h"
11
Gabe Blackd40be112013-10-09 23:45:07 -070012enum {
13 AS3722_I2C_ADDR = 0x40
14};
15
Julius Werneredf6b572013-10-25 17:49:26 -070016struct as3722_init_reg {
17 u8 reg;
18 u8 val;
Gabe Black1f4e2832014-03-05 22:24:54 -080019 u8 delay;
Julius Werneredf6b572013-10-25 17:49:26 -070020};
21
22static struct as3722_init_reg init_list[] = {
Gabe Black1f4e2832014-03-05 22:24:54 -080023 {AS3722_SDO0, 0x3C, 1},
24 {AS3722_SDO1, 0x32, 0},
25 {AS3722_LDO3, 0x59, 0},
26 {AS3722_SDO2, 0x3C, 0},
27 {AS3722_SDO3, 0x00, 0},
28 {AS3722_SDO4, 0x00, 0},
29 {AS3722_SDO5, 0x50, 0},
30 {AS3722_SDO6, 0x28, 1},
31 {AS3722_LDO0, 0x8A, 0},
32 {AS3722_LDO1, 0x00, 0},
33 {AS3722_LDO2, 0x10, 0},
34 {AS3722_LDO4, 0x00, 0},
35 {AS3722_LDO5, 0x00, 0},
Hung-Te Lin86bd91a2014-04-25 08:21:24 +080036 {AS3722_LDO6, 0x00, 0},
Gabe Black1f4e2832014-03-05 22:24:54 -080037 {AS3722_LDO7, 0x00, 0},
38 {AS3722_LDO9, 0x00, 0},
39 {AS3722_LDO10, 0x00, 0},
40 {AS3722_LDO11, 0x00, 1},
Julius Werneredf6b572013-10-25 17:49:26 -070041};
Julius Werneredf6b572013-10-25 17:49:26 -070042
Martin Rothad0f4852019-10-23 21:41:43 -060043static void pmic_write_reg(unsigned int bus, uint8_t reg, uint8_t val, int do_delay)
Gabe Blackd40be112013-10-09 23:45:07 -070044{
Tom Warrenbb932c52014-04-30 14:51:38 -070045 if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) {
46 printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
47 __func__, reg, val);
48 /* Reset the SoC on any PMIC write error */
Nico Hubere8791362018-10-06 17:53:14 +020049 board_reset();
Tom Warrenbb932c52014-04-30 14:51:38 -070050 } else {
51 if (do_delay)
52 udelay(500);
53 }
Julius Werneredf6b572013-10-25 17:49:26 -070054}
Gabe Blackd40be112013-10-09 23:45:07 -070055
Martin Rothad0f4852019-10-23 21:41:43 -060056static void pmic_slam_defaults(unsigned int bus)
Julius Werneredf6b572013-10-25 17:49:26 -070057{
58 int i;
Gabe Black1f4e2832014-03-05 22:24:54 -080059 for (i = 0; i < ARRAY_SIZE(init_list); i++) {
60 struct as3722_init_reg *reg = &init_list[i];
61 pmic_write_reg(bus, reg->reg, reg->val, reg->delay);
62 }
Julius Werneredf6b572013-10-25 17:49:26 -070063}
64
Martin Rothad0f4852019-10-23 21:41:43 -060065void pmic_init(unsigned int bus)
Julius Werneredf6b572013-10-25 17:49:26 -070066{
67 /*
68 * Don't need to set up VDD_CORE - already done - by OTP
69 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
70 * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.
71 */
72
73 /* Restore PMIC POR defaults, in case kernel changed 'em */
74 pmic_slam_defaults(bus);
75
76 /* First set VDD_CPU to 1.2V, then enable the VDD_CPU regulator. */
77 if (board_id() == 0)
Gabe Black1f4e2832014-03-05 22:24:54 -080078 pmic_write_reg(bus, 0x00, 0x3c, 1);
Julius Werneredf6b572013-10-25 17:49:26 -070079 else
Gabe Black1f4e2832014-03-05 22:24:54 -080080 pmic_write_reg(bus, 0x00, 0x50, 1);
Gabe Blackd40be112013-10-09 23:45:07 -070081
82 /* First set VDD_GPU to 1.0V, then enable the VDD_GPU regulator. */
Gabe Black1f4e2832014-03-05 22:24:54 -080083 pmic_write_reg(bus, 0x06, 0x28, 1);
Gabe Blackd40be112013-10-09 23:45:07 -070084
Gabe Black1f4e2832014-03-05 22:24:54 -080085 /*
86 * First set +1.2V_GEN_AVDD to 1.2V, then enable the +1.2V_GEN_AVDD
87 * regulator.
88 */
89 pmic_write_reg(bus, 0x12, 0x10, 1);
Gabe Blackd40be112013-10-09 23:45:07 -070090
91 /*
Julius Werneredf6b572013-10-25 17:49:26 -070092 * Panel power GPIO O4. Set mode for GPIO4 (0x0c to 7), then set
Hung-Te Lin2fc3b622013-10-21 21:43:03 +080093 * the value (register 0x20 bit 4)
94 */
Gabe Black1f4e2832014-03-05 22:24:54 -080095 pmic_write_reg(bus, 0x0c, 0x07, 0);
96 pmic_write_reg(bus, 0x20, 0x10, 1);
Gabe Blackd40be112013-10-09 23:45:07 -070097}