| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 1 | if BOARD_INTEL_STRAGO |
| 2 | |
| 3 | config BOARD_SPECIFIC_OPTIONS |
| 4 | def_bool y |
| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 5 | select BOARD_ROMSIZE_KB_8192 |
| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 6 | select EC_GOOGLE_CHROMEEC |
| Furquan Shaikh | a4ab665 | 2017-09-25 08:06:56 -0700 | [diff] [blame] | 7 | select EC_GOOGLE_CHROMEEC_BOARDID |
| Martin Roth | dcf86e0 | 2019-08-29 12:32:53 -0600 | [diff] [blame] | 8 | select EC_GOOGLE_CHROMEEC_LPC |
| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 9 | select EC_GOOGLE_CHROMEEC_MEC |
| 10 | select EC_GOOGLE_CHROMEEC_ACPI_MEMMAP |
| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 11 | select ENABLE_BUILTIN_COM1 |
| 12 | select HAVE_ACPI_RESUME |
| 13 | select HAVE_ACPI_TABLES |
| 14 | select HAVE_OPTION_TABLE |
| 15 | select MAINBOARD_HAS_CHROMEOS |
| 16 | select MAINBOARD_HAS_LPC_TPM |
| 17 | select SOC_INTEL_BRASWELL |
| Kenji Chen | b1e4bd0 | 2015-11-16 17:08:32 +0800 | [diff] [blame] | 18 | select PCIEXP_L1_SUB_STATE |
| Martin Roth | 967cd9a | 2015-08-18 14:22:58 -0600 | [diff] [blame] | 19 | |
| Julius Werner | 58c3938 | 2017-02-13 17:53:29 -0800 | [diff] [blame] | 20 | config VBOOT |
| Furquan Shaikh | cd2afc0 | 2016-11-15 20:33:29 -0800 | [diff] [blame] | 21 | select EC_GOOGLE_CHROMEEC_SWITCHES |
| Julius Werner | 58c3938 | 2017-02-13 17:53:29 -0800 | [diff] [blame] | 22 | select VBOOT_LID_SWITCH |
| Furquan Shaikh | 2a12e2e | 2016-07-25 11:48:03 -0700 | [diff] [blame] | 23 | select VBOOT_VBNV_CMOS |
| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 24 | |
| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 25 | config MAINBOARD_DIR |
| 26 | string |
| Patrick Georgi | 0bb8346 | 2019-11-22 20:58:58 +0100 | [diff] [blame] | 27 | default "intel/strago" |
| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 28 | |
| 29 | config MAINBOARD_PART_NUMBER |
| 30 | string |
| 31 | default "Strago" |
| 32 | |
| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 33 | config VGA_BIOS_FILE |
| 34 | string |
| Nico Huber | 2e7f6cc | 2017-05-22 15:58:03 +0200 | [diff] [blame] | 35 | depends on VGA_BIOS |
| Martin Roth | f812c44 | 2016-01-04 12:43:22 -0700 | [diff] [blame] | 36 | default "3rdparty/blobs/mainboard/intel/strago/vgabios.bin" |
| 37 | help |
| Elyes HAOUAS | 6dc9d03 | 2020-02-16 16:22:52 +0100 | [diff] [blame] | 38 | The C0 version of the video BIOS gets computed from this name |
| Martin Roth | f812c44 | 2016-01-04 12:43:22 -0700 | [diff] [blame] | 39 | so that they can both be added. Only the correct one for the |
| 40 | system will be run. |
| 41 | |
| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 42 | config VGA_BIOS_ID |
| 43 | string |
| Nico Huber | 2e7f6cc | 2017-05-22 15:58:03 +0200 | [diff] [blame] | 44 | depends on VGA_BIOS |
| Martin Roth | f812c44 | 2016-01-04 12:43:22 -0700 | [diff] [blame] | 45 | default "8086,22b0" |
| 46 | help |
| Elyes HAOUAS | 6dc9d03 | 2020-02-16 16:22:52 +0100 | [diff] [blame] | 47 | The VGA_BIOS_ID for the C0 version of the video BIOS is hardcoded |
| Martin Roth | f812c44 | 2016-01-04 12:43:22 -0700 | [diff] [blame] | 48 | in soc/intel/braswell/Makefile.inc as 8086,22b1 |
| 49 | |
| Matt DeVillier | 7144702 | 2019-04-30 11:10:03 -0500 | [diff] [blame] | 50 | config CBFS_SIZE |
| Matt DeVillier | 7144702 | 2019-04-30 11:10:03 -0500 | [diff] [blame] | 51 | default 0x200000 |
| 52 | |
| Lee Leahy | 5cb9dda | 2015-05-01 10:34:54 -0700 | [diff] [blame] | 53 | endif # BOARD_INTEL_STRAGO |