| Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| Tristan Corrick | 3f7de06 | 2018-03-02 03:02:07 +1300 | [diff] [blame] | 2 | |
| Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 3 | #include <bootblock_common.h> |
| Kyösti Mälkki | 3855c01 | 2019-03-03 08:45:19 +0200 | [diff] [blame] | 4 | #include <device/pnp_ops.h> |
| Tristan Corrick | 3f7de06 | 2018-03-02 03:02:07 +1300 | [diff] [blame] | 5 | #include <southbridge/intel/bd82x6x/pch.h> |
| 6 | #include <superio/nuvoton/common/nuvoton.h> |
| 7 | #include <superio/nuvoton/nct6776/nct6776.h> |
| 8 | |
| Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 9 | void bootblock_mainboard_early_init(void) |
| Tristan Corrick | 3f7de06 | 2018-03-02 03:02:07 +1300 | [diff] [blame] | 10 | { |
| 11 | static const pnp_devfn_t GLOBAL_PSEUDO_DEV = PNP_DEV(0x2e, 0); |
| 12 | static const pnp_devfn_t ACPI_DEV = PNP_DEV(0x2e, NCT6776_ACPI); |
| 13 | |
| 14 | nuvoton_pnp_enter_conf_state(GLOBAL_PSEUDO_DEV); |
| 15 | |
| 16 | /* Select HWM/LED functions instead of floppy functions. */ |
| 17 | pnp_write_config(GLOBAL_PSEUDO_DEV, 0x1c, 0x03); |
| 18 | pnp_write_config(GLOBAL_PSEUDO_DEV, 0x24, 0x24); |
| 19 | |
| 20 | /* Power RAM in S3. */ |
| 21 | pnp_set_logical_device(ACPI_DEV); |
| 22 | pnp_write_config(ACPI_DEV, 0xe4, 0x10); |
| 23 | |
| 24 | nuvoton_pnp_exit_conf_state(GLOBAL_PSEUDO_DEV); |
| 25 | } |