Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <console/console.h> |
| 17 | #include <arch/smp/mpspec.h> |
| 18 | #include <device/pci.h> |
| 19 | #include <arch/io.h> |
| 20 | #include <string.h> |
| 21 | #include <stdint.h> |
| 22 | |
| 23 | #include <cpu/amd/amdk8_sysconf.h> |
| 24 | |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 25 | extern u8 bus_rs690[8]; |
| 26 | extern u8 bus_sb600[2]; |
| 27 | |
| 28 | extern u32 apicid_sb600; |
| 29 | |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 30 | extern u32 sbdn_rs690; |
| 31 | extern u32 sbdn_sb600; |
| 32 | |
| 33 | static void *smp_write_config_table(void *v) |
| 34 | { |
| 35 | struct mp_config_table *mc; |
| 36 | int isa_bus; |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 37 | |
Elyes HAOUAS | 8da96e5 | 2016-09-22 21:20:54 +0200 | [diff] [blame] | 38 | mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
Patrick Georgi | c8feedd | 2012-02-16 18:43:25 +0100 | [diff] [blame] | 39 | mptable_init(mc, LOCAL_APIC_ADDR); |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 40 | smp_write_processors(mc); |
| 41 | |
| 42 | get_bus_conf(); |
Patrick Georgi | c5ae306 | 2011-10-06 14:34:22 +0200 | [diff] [blame] | 43 | printk(BIOS_DEBUG, "%s: apic_id=0x%x\n", __func__, apicid_sb600); |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 44 | |
| 45 | mptable_write_buses(mc, NULL, &isa_bus); |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 46 | /* I/O APICs: APIC ID Version State Address */ |
| 47 | { |
| 48 | device_t dev; |
| 49 | |
| 50 | dev = dev_find_slot(bus_sb600[0], PCI_DEVFN(sbdn_sb600 + 0x14, 0)); |
| 51 | if (dev) { |
| 52 | struct resource *res; |
| 53 | res = find_resource(dev, 0x74); |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 54 | smp_write_ioapic(mc, apicid_sb600, 0x20, |
| 55 | res2mmio(res, 0, 0)); |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 56 | } |
| 57 | } |
Patrick Georgi | c5ae306 | 2011-10-06 14:34:22 +0200 | [diff] [blame] | 58 | mptable_add_isa_interrupts(mc, isa_bus, apicid_sb600, 0); |
| 59 | |
Patrick Georgi | 5ed8cc0 | 2011-10-06 14:36:08 +0200 | [diff] [blame] | 60 | #define PCI_INT(bus, dev, fn, pin) \ |
| 61 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb600, (pin)) |
| 62 | |
| 63 | /* usb */ |
| 64 | PCI_INT(0x0, 0x13, 0x0, 0x10); |
| 65 | PCI_INT(0x0, 0x13, 0x1, 0x11); |
| 66 | PCI_INT(0x0, 0x13, 0x2, 0x12); |
| 67 | PCI_INT(0x0, 0x13, 0x3, 0x13); |
| 68 | |
| 69 | /* sata */ |
| 70 | PCI_INT(0x0, 0x12, 0x1, 0x16); |
| 71 | |
| 72 | /* SMBus/ACPI */ |
| 73 | PCI_INT(0x0, 0x14, 0x0, 0x10); |
| 74 | /* IDE */ |
| 75 | PCI_INT(0x0, 0x14, 0x1, 0x11); |
| 76 | /* HDA */ |
| 77 | PCI_INT(0x0, 0x14, 0x2, 0x12); |
| 78 | /* LPC */ |
| 79 | PCI_INT(0x0, 0x14, 0x3, 0x13); |
| 80 | |
| 81 | /* GFX ? */ |
| 82 | PCI_INT(bus_rs690[1], 0x5, 0x0, 0x12); |
| 83 | PCI_INT(bus_rs690[1], 0x5, 0x1, 0x13); |
| 84 | |
| 85 | /* PCIe slots */ |
| 86 | PCI_INT(0x2, 0x00, 0x00, 0x10); |
| 87 | PCI_INT(0x2, 0x00, 0x01, 0x11); |
| 88 | PCI_INT(0x2, 0x00, 0x02, 0x12); |
| 89 | PCI_INT(0x2, 0x00, 0x03, 0x13); |
| 90 | |
| 91 | /* PCIe slots */ |
| 92 | PCI_INT(0x3, 0x00, 0x00, 0x11); |
| 93 | PCI_INT(0x3, 0x00, 0x01, 0x12); |
| 94 | PCI_INT(0x3, 0x00, 0x02, 0x13); |
| 95 | PCI_INT(0x3, 0x00, 0x03, 0x10); |
| 96 | |
| 97 | /* PCIe slots */ |
| 98 | PCI_INT(0x4, 0x00, 0x00, 0x12); |
| 99 | PCI_INT(0x4, 0x00, 0x01, 0x13); |
| 100 | PCI_INT(0x4, 0x00, 0x02, 0x10); |
| 101 | PCI_INT(0x4, 0x00, 0x03, 0x11); |
| 102 | |
| 103 | /* PCIe slots */ |
| 104 | PCI_INT(0x5, 0x00, 0x00, 0x13); |
| 105 | PCI_INT(0x5, 0x00, 0x01, 0x10); |
| 106 | PCI_INT(0x5, 0x00, 0x02, 0x11); |
| 107 | PCI_INT(0x5, 0x00, 0x03, 0x12); |
| 108 | |
| 109 | /* onboard NIC ? */ |
| 110 | PCI_INT(bus_sb600[1], 0x7, 0x0, 0x13); |
| 111 | PCI_INT(bus_sb600[1], 0x7, 0x1, 0x10); |
| 112 | PCI_INT(bus_sb600[1], 0x7, 0x2, 0x11); |
| 113 | PCI_INT(bus_sb600[1], 0x7, 0x3, 0x12); |
| 114 | |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 115 | /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ |
Patrick Georgi | c5ae306 | 2011-10-06 14:34:22 +0200 | [diff] [blame] | 116 | mptable_lintsrc(mc, isa_bus); |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 117 | |
| 118 | /* Compute the checksums */ |
Patrick Georgi | b0a9c5c | 2011-10-07 23:01:55 +0200 | [diff] [blame] | 119 | return mptable_finalize(mc); |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 120 | } |
| 121 | |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 122 | unsigned long write_smp_table(unsigned long addr) |
| 123 | { |
| 124 | void *v; |
Patrick Georgi | 4e2d542 | 2011-10-06 15:24:08 +0200 | [diff] [blame] | 125 | v = smp_write_floating_table(addr, 0); |
Josef Kellermann | bfa7ee5 | 2011-05-11 07:47:43 +0000 | [diff] [blame] | 126 | return (unsigned long)smp_write_config_table(v); |
| 127 | } |