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Edward O'Callaghan32960e32014-11-23 17:38:52 +11001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Edward O'Callaghan32960e32014-11-23 17:38:52 +110014 */
15
Kyösti Mälkkif21c2ac2014-10-19 09:35:18 +030016#include <northbridge/amd/agesa/agesawrapper.h>
Kyösti Mälkkid610c582017-03-05 06:28:18 +020017#include <northbridge/amd/agesa/agesa_helper.h>
Edward O'Callaghan32960e32014-11-23 17:38:52 +110018
19#include <arch/acpi.h>
20#include <arch/cpu.h>
21#include <arch/io.h>
22#include <arch/stages.h>
23#include <cbmem.h>
24#include <console/console.h>
25#include <cpu/amd/agesa/s3_resume.h>
26#include <cpu/x86/bist.h>
27#include <cpu/x86/lapic.h>
28#include <cpu/amd/car.h>
29#include <device/pci_def.h>
30#include <device/pci_ids.h>
31#include <stdint.h>
32#include <string.h>
33#include <southbridge/amd/agesa/hudson/hudson.h>
34
35void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
36{
37 u32 val;
Kyösti Mälkki59e03342016-11-20 11:03:13 +020038
39 /* Must come first to enable PCI MMCONF. */
Kyösti Mälkki48518f02014-11-25 14:20:57 +020040 amd_initmmio();
Edward O'Callaghan32960e32014-11-23 17:38:52 +110041
Edward O'Callaghan32960e32014-11-23 17:38:52 +110042 hudson_lpc_port80();
43
44 if (!cpu_init_detectedx && boot_cpu()) {
45 post_code(0x30);
46
47 post_code(0x31);
48 console_init();
49 }
50
51 /* Halt if there was a built in self test failure */
52 post_code(0x34);
53 report_bist_failure(bist);
54
55 /* Load MPB */
56 val = cpuid_eax(1);
57 printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
58 printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
59
60 post_code(0x37);
Kyösti Mälkki1aa35c62014-10-21 14:19:04 +030061 agesawrapper_amdinitreset();
Edward O'Callaghan32960e32014-11-23 17:38:52 +110062 post_code(0x39);
63
Kyösti Mälkki1aa35c62014-10-21 14:19:04 +030064 agesawrapper_amdinitearly();
Kyösti Mälkki78c5d582015-01-09 23:48:47 +020065 int s3resume = acpi_is_wakeup_s3();
Edward O'Callaghan32960e32014-11-23 17:38:52 +110066 if (!s3resume) {
67 post_code(0x40);
Kyösti Mälkki1aa35c62014-10-21 14:19:04 +030068 agesawrapper_amdinitpost();
Edward O'Callaghan32960e32014-11-23 17:38:52 +110069 post_code(0x41);
Kyösti Mälkki1aa35c62014-10-21 14:19:04 +030070 agesawrapper_amdinitenv();
Edward O'Callaghan32960e32014-11-23 17:38:52 +110071 disable_cache_as_ram();
72 } else { /* S3 detect */
73 printk(BIOS_INFO, "S3 detected\n");
74
75 post_code(0x60);
Kyösti Mälkki1aa35c62014-10-21 14:19:04 +030076 agesawrapper_amdinitresume();
Edward O'Callaghan32960e32014-11-23 17:38:52 +110077
Kyösti Mälkki48518f02014-11-25 14:20:57 +020078 amd_initcpuio();
Kyösti Mälkki1aa35c62014-10-21 14:19:04 +030079 agesawrapper_amds3laterestore();
Edward O'Callaghan32960e32014-11-23 17:38:52 +110080
81 post_code(0x61);
82 prepare_for_resume();
83 }
84
85 post_code(0x50);
86 copy_and_run();
87
88 post_code(0x54); /* Should never see this post code. */
89}