Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 14 | */ |
| 15 | |
Kyösti Mälkki | f21c2ac | 2014-10-19 09:35:18 +0300 | [diff] [blame] | 16 | #include <northbridge/amd/agesa/agesawrapper.h> |
Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 17 | |
| 18 | #include <arch/acpi.h> |
| 19 | #include <arch/cpu.h> |
| 20 | #include <arch/io.h> |
| 21 | #include <arch/stages.h> |
| 22 | #include <cbmem.h> |
| 23 | #include <console/console.h> |
| 24 | #include <cpu/amd/agesa/s3_resume.h> |
| 25 | #include <cpu/x86/bist.h> |
| 26 | #include <cpu/x86/lapic.h> |
| 27 | #include <cpu/amd/car.h> |
| 28 | #include <device/pci_def.h> |
| 29 | #include <device/pci_ids.h> |
| 30 | #include <stdint.h> |
| 31 | #include <string.h> |
| 32 | #include <southbridge/amd/agesa/hudson/hudson.h> |
| 33 | |
| 34 | void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |
| 35 | { |
| 36 | u32 val; |
Kyösti Mälkki | 59e0334 | 2016-11-20 11:03:13 +0200 | [diff] [blame^] | 37 | |
| 38 | /* Must come first to enable PCI MMCONF. */ |
Kyösti Mälkki | 48518f0 | 2014-11-25 14:20:57 +0200 | [diff] [blame] | 39 | amd_initmmio(); |
Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 40 | |
Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 41 | hudson_lpc_port80(); |
| 42 | |
| 43 | if (!cpu_init_detectedx && boot_cpu()) { |
| 44 | post_code(0x30); |
| 45 | |
| 46 | post_code(0x31); |
| 47 | console_init(); |
| 48 | } |
| 49 | |
| 50 | /* Halt if there was a built in self test failure */ |
| 51 | post_code(0x34); |
| 52 | report_bist_failure(bist); |
| 53 | |
| 54 | /* Load MPB */ |
| 55 | val = cpuid_eax(1); |
| 56 | printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); |
| 57 | printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); |
| 58 | |
| 59 | post_code(0x37); |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame] | 60 | agesawrapper_amdinitreset(); |
Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 61 | post_code(0x39); |
| 62 | |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame] | 63 | agesawrapper_amdinitearly(); |
Kyösti Mälkki | 78c5d58 | 2015-01-09 23:48:47 +0200 | [diff] [blame] | 64 | int s3resume = acpi_is_wakeup_s3(); |
Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 65 | if (!s3resume) { |
| 66 | post_code(0x40); |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame] | 67 | agesawrapper_amdinitpost(); |
Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 68 | post_code(0x41); |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame] | 69 | agesawrapper_amdinitenv(); |
Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 70 | disable_cache_as_ram(); |
| 71 | } else { /* S3 detect */ |
| 72 | printk(BIOS_INFO, "S3 detected\n"); |
| 73 | |
| 74 | post_code(0x60); |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame] | 75 | agesawrapper_amdinitresume(); |
Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 76 | |
Kyösti Mälkki | 48518f0 | 2014-11-25 14:20:57 +0200 | [diff] [blame] | 77 | amd_initcpuio(); |
Kyösti Mälkki | 1aa35c6 | 2014-10-21 14:19:04 +0300 | [diff] [blame] | 78 | agesawrapper_amds3laterestore(); |
Edward O'Callaghan | 32960e3 | 2014-11-23 17:38:52 +1100 | [diff] [blame] | 79 | |
| 80 | post_code(0x61); |
| 81 | prepare_for_resume(); |
| 82 | } |
| 83 | |
| 84 | post_code(0x50); |
| 85 | copy_and_run(); |
| 86 | |
| 87 | post_code(0x54); /* Should never see this post code. */ |
| 88 | } |