Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2013 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <types.h> |
| 17 | #include <string.h> |
| 18 | #include <stdlib.h> |
| 19 | #include <device/device.h> |
| 20 | #include <device/device.h> |
| 21 | #include <device/pci_def.h> |
| 22 | #include <device/pci_ops.h> |
| 23 | #include <console/console.h> |
| 24 | #include <delay.h> |
| 25 | #include <pc80/mc146818rtc.h> |
| 26 | #include <arch/acpi.h> |
| 27 | #include <arch/io.h> |
| 28 | #include <arch/interrupt.h> |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 29 | #include <boot/coreboot_tables.h> |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 30 | #include <smbios.h> |
| 31 | #include <device/pci.h> |
| 32 | #include <ec/google/chromeec/ec.h> |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 33 | |
| 34 | #include <cpu/x86/tsc.h> |
| 35 | #include <cpu/x86/cache.h> |
| 36 | #include <cpu/x86/mtrr.h> |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 37 | #include <cpu/x86/msr.h> |
| 38 | #include <edid.h> |
Stefan Reinauer | f69a27b | 2015-01-06 13:08:23 -0800 | [diff] [blame] | 39 | #include <drivers/intel/gma/i915.h> |
Ronald G. Minnich | 78c3e33 | 2013-04-24 09:50:56 -0700 | [diff] [blame] | 40 | |
| 41 | /* how many bytes do we need for the framebuffer? |
| 42 | * Well, this gets messy. To get an exact answer, we have |
| 43 | * to ask the panel, but we'd rather zero the memory |
| 44 | * and set up the gtt while the panel powers up. So, |
| 45 | * we take a reasonable guess, secure in the knowledge that the |
| 46 | * MRC has to overestimate the number of bytes used. |
| 47 | * 8 MiB is a very safe guess. There may be a better way later, but |
| 48 | * fact is, the initial framebuffer is only very temporary. And taking |
| 49 | * a little long is ok; this is done much faster than the AUX |
| 50 | * channel is ready for IO. |
| 51 | */ |
| 52 | #define FRAME_BUFFER_BYTES (8*MiB) |
| 53 | /* how many 4096-byte pages do we need for the framebuffer? |
| 54 | * There are hard ways to get this, and easy ways: |
| 55 | * there are FRAME_BUFFER_BYTES/4096 pages, since pages are 4096 |
| 56 | * on this chip (and in fact every Intel graphics chip we've seen). |
| 57 | */ |
| 58 | #define FRAME_BUFFER_PAGES (FRAME_BUFFER_BYTES/(4096)) |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 59 | |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 60 | static int verbose = 0; |
| 61 | |
| 62 | static unsigned int *mmio; |
| 63 | static unsigned int graphics; |
| 64 | static unsigned short addrport; |
| 65 | static unsigned short dataport; |
| 66 | static unsigned int physbase; |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 67 | |
| 68 | const u32 link_edid_data[] = { |
| 69 | 0xffffff00, 0x00ffffff, 0x0379e430, 0x00000000, |
| 70 | 0x04011500, 0x96121ba5, 0xa2d54f02, 0x26935259, |
| 71 | 0x00545017, 0x01010000, 0x01010101, 0x01010101, |
| 72 | 0x01010101, 0x6f6d0101, 0xa4a0a000, 0x20306031, |
| 73 | 0xb510003a, 0x19000010, 0x00000000, 0x00000000, |
| 74 | 0x00000000, 0x00000000, 0x00000000, 0x4c00fe00, |
| 75 | 0x69442047, 0x616c7073, 0x20200a79, 0xfe000000, |
| 76 | 0x31504c00, 0x45513932, 0x50532d31, 0x24003141, |
| 77 | }; |
| 78 | |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 79 | static int ioread = 0, iowrite = 0; |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 80 | |
| 81 | static char *regname(unsigned long addr) |
| 82 | { |
| 83 | static char name[16]; |
Elyes HAOUAS | ec28aad | 2016-10-03 21:32:58 +0200 | [diff] [blame] | 84 | snprintf(name, sizeof(name), "0x%lx", addr); |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 85 | return name; |
| 86 | } |
| 87 | |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 88 | unsigned long io_i915_read32(unsigned long addr) |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 89 | { |
| 90 | unsigned long val; |
| 91 | outl(addr, addrport); |
| 92 | val = inl(dataport); |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 93 | ioread += 2; |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 94 | if (verbose & vio)printk(BIOS_SPEW, "%s: Got %08lx\n", regname(addr), val); |
| 95 | return val; |
| 96 | } |
| 97 | |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 98 | void io_i915_write32(unsigned long val, unsigned long addr) |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 99 | { |
| 100 | if (verbose & vio)printk(BIOS_SPEW, "%s: outl %08lx\n", regname(addr), val); |
| 101 | outl(addr, addrport); |
| 102 | outl(val, dataport); |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 103 | iowrite += 2; |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 104 | } |
| 105 | |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 106 | /* GTT is the Global Translation Table for the graphics pipeline. |
| 107 | * It is used to translate graphics addresses to physical |
| 108 | * memory addresses. As in the CPU, GTTs map 4K pages. |
| 109 | * The setgtt function adds a further bit of flexibility: |
| 110 | * it allows you to set a range (the first two parameters) to point |
| 111 | * to a physical address (third parameter);the physical address is |
| 112 | * incremented by a count (fourth parameter) for each GTT in the |
| 113 | * range. |
| 114 | * Why do it this way? For ultrafast startup, |
| 115 | * we can point all the GTT entries to point to one page, |
| 116 | * and set that page to 0s: |
| 117 | * memset(physbase, 0, 4096); |
| 118 | * setgtt(0, 4250, physbase, 0); |
| 119 | * this takes about 2 ms, and is a win because zeroing |
| 120 | * the page takes a up to 200 ms. |
| 121 | * This call sets the GTT to point to a linear range of pages |
| 122 | * starting at physbase. |
| 123 | */ |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 124 | |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 125 | static void |
| 126 | setgtt(int start, int end, unsigned long base, int inc) |
| 127 | { |
| 128 | int i; |
| 129 | |
| 130 | for(i = start; i < end; i++){ |
| 131 | u32 word = base + i*inc; |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 132 | io_i915_write32(word|1,(i*4)|1); |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 133 | } |
| 134 | } |
| 135 | |
| 136 | static unsigned long tickspermicrosecond = 1795; |
| 137 | static unsigned long long globalstart; |
| 138 | |
| 139 | static unsigned long |
| 140 | microseconds(unsigned long long start, unsigned long long end) |
| 141 | { |
| 142 | unsigned long ret; |
| 143 | ret = ((end - start)/tickspermicrosecond); |
| 144 | return ret; |
| 145 | } |
| 146 | |
| 147 | static unsigned long globalmicroseconds(void) |
| 148 | { |
| 149 | return microseconds(globalstart, rdtscll()); |
| 150 | } |
| 151 | |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 152 | static int i915_init_done = 0; |
| 153 | |
Ronald G. Minnich | b2893a01 | 2013-04-23 10:59:11 -0700 | [diff] [blame] | 154 | int i915lightup(unsigned int physbase, unsigned int iobase, unsigned int mmio, |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 155 | unsigned int gfx); |
| 156 | |
| 157 | int i915lightup(unsigned int pphysbase, unsigned int piobase, |
| 158 | unsigned int pmmio, unsigned int pgfx) |
| 159 | { |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 160 | int must_cycle_power = 0; |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 161 | |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 162 | /* frame buffer pointer */ |
| 163 | u32 *l; |
| 164 | int i; |
| 165 | unsigned long before_gtt, after_gtt; |
| 166 | |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 167 | mmio = (void *)pmmio; |
| 168 | addrport = piobase; |
| 169 | dataport = addrport + 4; |
| 170 | physbase = pphysbase; |
| 171 | graphics = pgfx; |
| 172 | printk(BIOS_SPEW, |
| 173 | "i915lightup: graphics %p mmio %p" |
| 174 | "addrport %04x physbase %08x\n", |
| 175 | (void *)graphics, mmio, addrport, physbase); |
| 176 | globalstart = rdtscll(); |
| 177 | |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 178 | /* turn it on. The VBIOS does it this way, so we hope that's ok. */ |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 179 | verbose = 0; |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 180 | io_i915_write32(0xabcd000f, PCH_PP_CONTROL); |
| 181 | |
| 182 | /* the AUX channel needs a small amount of time to spin up. |
| 183 | * Rather than udelay, do some useful work: |
| 184 | * Zero out the frame buffer memory, |
| 185 | * and set the global translation table (GTT) |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 186 | */ |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 187 | printk(BIOS_SPEW, "Set not-White (%08x) for %d pixels\n", 0xffffff, |
| 188 | FRAME_BUFFER_BYTES/sizeof(u32)); |
| 189 | for(l = (u32 *)graphics, i = 0; |
| 190 | i < FRAME_BUFFER_BYTES/sizeof(u32); i++){ |
| 191 | l[i] = 0x1122ff; |
| 192 | } |
| 193 | printk(BIOS_SPEW, "GTT: set %d pages starting at %p\n", |
| 194 | FRAME_BUFFER_PAGES, (void *)physbase); |
| 195 | before_gtt = globalmicroseconds(); |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 196 | setgtt(0, FRAME_BUFFER_PAGES, physbase, 4096); |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 197 | after_gtt = globalmicroseconds(); |
| 198 | |
| 199 | /* The reset is basically harmless, and can be |
| 200 | * repeated by the VBIOS in any event. |
| 201 | */ |
| 202 | |
| 203 | graphics_register_reset(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, verbose); |
| 204 | |
| 205 | /* failures after this point can return without |
| 206 | * powering off the panel. |
| 207 | */ |
| 208 | |
| 209 | if (1) |
| 210 | goto fail; |
| 211 | /* failures after this point MUST power off the panel |
| 212 | * and wait 600 ms. |
| 213 | */ |
| 214 | |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 215 | i915_init_done = 1; |
Kyösti Mälkki | ab56b3b | 2013-11-28 16:44:51 +0200 | [diff] [blame] | 216 | return i915_init_done; |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 217 | |
| 218 | fail: |
| 219 | printk(BIOS_SPEW, "Graphics could not be started;"); |
| 220 | if (must_cycle_power){ |
| 221 | printk(BIOS_SPEW, "Turn off power and wait ..."); |
| 222 | io_i915_write32(0xabcd0000, PCH_PP_CONTROL); |
| 223 | udelay(600000); |
| 224 | } |
| 225 | printk(BIOS_SPEW, "Returning.\n"); |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 226 | return 0; |
Ronald G. Minnich | 4f78b18 | 2013-04-17 16:57:30 -0700 | [diff] [blame] | 227 | |
Ronald G. Minnich | 2a66d6b | 2013-03-28 17:01:43 -0700 | [diff] [blame] | 228 | } |