blob: a4917e019b09ecda6b0ad1f8512c833ea9df105f [file] [log] [blame]
Kerry She6401fdb2011-05-07 09:15:02 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Kerry She6401fdb2011-05-07 09:15:02 +000014 */
15
16#include <console/console.h>
17#include <device/device.h>
18#include <device/pci.h>
19#include <arch/io.h>
Kerry She6401fdb2011-05-07 09:15:02 +000020#include <cpu/x86/msr.h>
21#include <cpu/amd/mtrr.h>
Timothy Pearson7ad4dc5e2017-01-04 14:26:26 -060022#include <southbridge/amd/common/amd_defs.h>
Kerry She6401fdb2011-05-07 09:15:02 +000023#include <device/pci_def.h>
Kerry She6401fdb2011-05-07 09:15:02 +000024
25u8 is_dev3_present(void);
26void set_pcie_dereset(void);
27void set_pcie_reset(void);
28void enable_int_gfx(void);
29
30/* GPIO6. */
31void enable_int_gfx(void)
32{
Kerry She6401fdb2011-05-07 09:15:02 +000033 volatile u8 *gpio_reg;
34
Kerry Shefeed3292011-08-18 18:03:44 +080035 /* make sure the Acpi MMIO(fed80000) is accessible */
Damien Zammit75a3d1f2016-11-28 00:29:10 +110036 // XXX Redo this RWPMIO(SB_PMIOA_REG24, AccWidthUint8, ~(BIT0), BIT0);
Kerry She6401fdb2011-05-07 09:15:02 +000037
Timothy Pearson7ad4dc5e2017-01-04 14:26:26 -060038 gpio_reg = (volatile u8 *)AMD_SB_ACPI_MMIO_ADDR + 0xD00; /* IoMux Register */
Kerry She6401fdb2011-05-07 09:15:02 +000039
40 *(gpio_reg + 0x6) = 0x1; /* Int_vga_en */
41 *(gpio_reg + 170) = 0x1; /* gpio_gate */
42
Timothy Pearson7ad4dc5e2017-01-04 14:26:26 -060043 gpio_reg = (volatile u8 *)AMD_SB_ACPI_MMIO_ADDR + 0x100; /* GPIO Registers */
Kerry She6401fdb2011-05-07 09:15:02 +000044
45 *(gpio_reg + 0x6) = 0x8;
46 *(gpio_reg + 170) = 0x0;
47}
48
49void set_pcie_dereset()
50{
51}
52
53void set_pcie_reset(void)
54{
55}
56
57u8 is_dev3_present(void)
58{
59 return 0;
60}
61
62
63/*************************************************
64* enable the dedicated function in A785E-I board.
65* This function called early than rs780_enable.
66*************************************************/
Paul Menzel528640d2013-02-23 21:31:23 +010067static void mainboard_enable(device_t dev)
Kerry She6401fdb2011-05-07 09:15:02 +000068{
Kerry She6401fdb2011-05-07 09:15:02 +000069 printk(BIOS_INFO, "Mainboard A785E-I Enable. dev=0x%p\n", dev);
70
Kerry She6401fdb2011-05-07 09:15:02 +000071 set_pcie_dereset();
72 enable_int_gfx();
73}
74
Kerry She6401fdb2011-05-07 09:15:02 +000075struct chip_operations mainboard_ops = {
Paul Menzel528640d2013-02-23 21:31:23 +010076 .enable_dev = mainboard_enable,
Kerry She6401fdb2011-05-07 09:15:02 +000077};