Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
Paul Menzel | a46a712 | 2013-02-23 18:37:27 +0100 | [diff] [blame^] | 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 18 | */ |
| 19 | |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 20 | #include <console/console.h> |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 21 | #include <device/pci.h> |
Martin Roth | 3aef7b4 | 2012-12-05 15:50:32 -0700 | [diff] [blame] | 22 | #include <device/pci_def.h> |
Patrick Georgi | 2c2e78d | 2012-02-16 18:54:37 +0100 | [diff] [blame] | 23 | #include <arch/ioapic.h> |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 24 | #include "lpc.h" |
zbao | 9bcdbf8 | 2012-04-05 13:18:49 +0800 | [diff] [blame] | 25 | #include <arch/io.h> |
| 26 | #include <cbmem.h> |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 27 | |
| 28 | void lpc_read_resources(device_t dev) |
| 29 | { |
| 30 | struct resource *res; |
| 31 | |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 32 | printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_read_resources - Start.\n"); |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 33 | /* Get the normal pci resources of this device */ |
| 34 | pci_dev_read_resources(dev); /* We got one for APIC, or one more for TRAP */ |
| 35 | |
Martin Roth | 3aef7b4 | 2012-12-05 15:50:32 -0700 | [diff] [blame] | 36 | pci_get_resource(dev, SPIROM_BASE_ADDRESS_REGISTER); /* SPI ROM base address */ |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 37 | |
| 38 | /* Add an extra subtractive resource for both memory and I/O. */ |
| 39 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); |
| 40 | res->base = 0; |
| 41 | res->size = 0x1000; |
| 42 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 43 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 44 | |
| 45 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); |
| 46 | res->base = 0xff800000; |
| 47 | res->size = 0x00800000; /* 8 MB for flash */ |
| 48 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 49 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 50 | |
Patrick Georgi | 2c2e78d | 2012-02-16 18:54:37 +0100 | [diff] [blame] | 51 | res = new_resource(dev, 3); |
| 52 | res->base = IO_APIC_ADDR; |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 53 | res->size = 0x00001000; |
| 54 | res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 55 | |
| 56 | compact_resources(dev); |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 57 | printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_read_resources - End.\n"); |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 58 | } |
| 59 | |
| 60 | void lpc_set_resources(struct device *dev) |
| 61 | { |
| 62 | struct resource *res; |
| 63 | |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 64 | printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_set_resources - Start.\n"); |
Martin Roth | 3aef7b4 | 2012-12-05 15:50:32 -0700 | [diff] [blame] | 65 | |
| 66 | /* Special case. SPI Base Address. The SpiRomEnable should STAY set. */ |
| 67 | res = find_resource(dev, SPIROM_BASE_ADDRESS_REGISTER); |
| 68 | res->base |= PCI_COMMAND_MEMORY; |
| 69 | |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 70 | pci_dev_set_resources(dev); |
| 71 | |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 72 | printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_set_resources - End.\n"); |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 73 | } |
| 74 | |
| 75 | /** |
| 76 | * @brief Enable resources for children devices |
| 77 | * |
| 78 | * @param dev the device whos children's resources are to be enabled |
| 79 | * |
| 80 | */ |
| 81 | void lpc_enable_childrens_resources(device_t dev) |
| 82 | { |
| 83 | struct bus *link; |
| 84 | u32 reg, reg_x; |
| 85 | int var_num = 0; |
| 86 | u16 reg_var[3]; |
| 87 | |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 88 | printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_enable_childrens_resources - Start.\n"); |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 89 | reg = pci_read_config32(dev, 0x44); |
| 90 | reg_x = pci_read_config32(dev, 0x48); |
| 91 | |
| 92 | for (link = dev->link_list; link; link = link->next) { |
| 93 | device_t child; |
| 94 | for (child = link->children; child; |
| 95 | child = child->sibling) { |
| 96 | if (child->enabled |
| 97 | && (child->path.type == DEVICE_PATH_PNP)) { |
| 98 | struct resource *res; |
| 99 | for (res = child->resource_list; res; res = res->next) { |
| 100 | u32 base, end; /* don't need long long */ |
| 101 | if (!(res->flags & IORESOURCE_IO)) |
| 102 | continue; |
| 103 | base = res->base; |
| 104 | end = resource_end(res); |
| 105 | /* |
| 106 | printk(BIOS_DEBUG, "sb800 lpc decode:%s, base=0x%08x, end=0x%08x\n", |
| 107 | dev_path(child), base, end); |
| 108 | */ |
| 109 | switch (base) { |
| 110 | case 0x60: /* KB */ |
| 111 | case 0x64: /* MS */ |
| 112 | reg |= (1 << 29); |
| 113 | break; |
| 114 | case 0x3f8: /* COM1 */ |
| 115 | reg |= (1 << 6); |
| 116 | break; |
| 117 | case 0x2f8: /* COM2 */ |
| 118 | reg |= (1 << 7); |
| 119 | break; |
| 120 | case 0x378: /* Parallal 1 */ |
| 121 | reg |= (1 << 0); |
| 122 | break; |
| 123 | case 0x3f0: /* FD0 */ |
| 124 | reg |= (1 << 26); |
| 125 | break; |
| 126 | case 0x220: /* Aduio 0 */ |
| 127 | reg |= (1 << 8); |
| 128 | break; |
| 129 | case 0x300: /* Midi 0 */ |
| 130 | reg |= (1 << 18); |
| 131 | break; |
| 132 | case 0x400: |
| 133 | reg_x |= (1 << 16); |
| 134 | break; |
| 135 | case 0x480: |
| 136 | reg_x |= (1 << 17); |
| 137 | break; |
| 138 | case 0x500: |
| 139 | reg_x |= (1 << 18); |
| 140 | break; |
| 141 | case 0x580: |
| 142 | reg_x |= (1 << 19); |
| 143 | break; |
| 144 | case 0x4700: |
| 145 | reg_x |= (1 << 22); |
| 146 | break; |
| 147 | case 0xfd60: |
| 148 | reg_x |= (1 << 23); |
| 149 | break; |
| 150 | default: |
| 151 | if (var_num >= 3) |
| 152 | continue; /* only 3 var ; compact them ? */ |
| 153 | switch (var_num) { |
| 154 | case 0: |
| 155 | reg_x |= (1 << 2); |
| 156 | break; |
| 157 | case 1: |
| 158 | reg_x |= (1 << 24); |
| 159 | break; |
| 160 | case 2: |
| 161 | reg_x |= (1 << 25); |
| 162 | break; |
| 163 | } |
| 164 | reg_var[var_num++] = |
| 165 | base & 0xffff; |
| 166 | } |
| 167 | } |
| 168 | } |
| 169 | } |
| 170 | } |
| 171 | pci_write_config32(dev, 0x44, reg); |
| 172 | pci_write_config32(dev, 0x48, reg_x); |
| 173 | /* Set WideIO for as many IOs found (fall through is on purpose) */ |
| 174 | switch (var_num) { |
| 175 | case 2: |
| 176 | pci_write_config16(dev, 0x90, reg_var[2]); |
| 177 | case 1: |
| 178 | pci_write_config16(dev, 0x66, reg_var[1]); |
| 179 | case 0: |
| 180 | //pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata |
| 181 | break; |
| 182 | } |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 183 | printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_enable_childrens_resources - End.\n"); |
Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 184 | } |