blob: 8ace1e76371281e6ef064c3475cd38b2626057dc [file] [log] [blame]
Seunghwan Kim49d9b182024-02-02 09:17:57 +09001
YH Line4fb5e72024-01-12 01:27:40 +00002chip soc/intel/alderlake
Seunghwan Kim49d9b182024-02-02 09:17:57 +09003 register "domain_vr_config[VR_DOMAIN_IA]" = "{
4 .enable_fast_vmode = 1,
5 }"
YH Line4fb5e72024-01-12 01:27:40 +00006
Seunghwan Kim49d9b182024-02-02 09:17:57 +09007 register "sagv" = "SaGv_Enabled"
YH Line4fb5e72024-01-12 01:27:40 +00008
Seunghwan Kim49d9b182024-02-02 09:17:57 +09009 register "pch_slp_a_min_assertion_width" = "SLP_A_ASSERTION_DEFAULT"
10
11 # As per Intel Advisory doc#723158, the change is required to prevent possible
12 # display flickering issue.
13 register "disable_dynamic_tccold_handshake" = "true"
14
Seunghwan Kima2f47bb2024-02-08 10:01:35 +090015 register "tcc_offset" = "6" # TCC of 94
16
Seunghwan Kim49d9b182024-02-02 09:17:57 +090017 register "platform_pmax" = "145"
18
19 register "usb2_ports[0]" = "{
20 .enable = 1,
21 .ocpin = OC0,
22 .pre_emp_bias = USB2_BIAS_28P15MV,
23 .tx_bias = USB2_BIAS_0MV,
24 .tx_emp_enable = USB2_PRE_EMP_ON,
25 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
26 .type_c = 1,
27 }" # USB2_C0
28 register "usb2_ports[1]" = "USB2_PORT_EMPTY"
29 register "usb2_ports[2]" = "{
30 .enable = 1,
31 .ocpin = OC_SKIP,
32 .pre_emp_bias = USB2_BIAS_28P15MV,
33 .tx_bias = USB2_BIAS_0MV,
34 .tx_emp_enable = USB2_PRE_EMP_ON,
35 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
36 .type_c = 1,
37 }" # USB2_C2
38 register "usb2_ports[3]" = "{
39 .enable = 1,
40 .ocpin = OC_SKIP,
41 .pre_emp_bias = USB2_BIAS_28P15MV,
42 .tx_bias = USB2_BIAS_0MV,
43 .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
44 .pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
45 }" # uSD
46 register "usb2_ports[4]" = "{
47 .enable = 1,
48 .ocpin = OC_SKIP,
49 .pre_emp_bias = USB2_BIAS_28P15MV,
50 .tx_bias = USB2_BIAS_11P25MV,
51 .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
52 .pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
53 }" # USB2_A1
54 register "usb2_ports[5]" = "{
55 .enable = 1,
56 .ocpin = OC_SKIP,
57 .pre_emp_bias = USB2_BIAS_28P15MV,
58 .tx_bias = USB2_BIAS_0MV,
59 .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
60 .pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
61 }" # Camera
62 register "usb2_ports[6]" = "USB2_PORT_EMPTY"
63 register "usb2_ports[7]" = "USB2_PORT_EMPTY"
64 register "usb2_ports[8]" = "USB2_PORT_EMPTY"
65 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
66
67 register "usb3_ports[0]" = "USB3_PORT_EMPTY"
68 register "usb3_ports[1]" = "USB3_PORT_EMPTY"
69 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3_A1
70 register "usb3_ports[3]" = "USB3_PORT_EMPTY"
71
72 register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC0)"
73 register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
74 register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
75 register "tcss_ports[3]" = "TCSS_PORT_EMPTY"
76
77 register "tcss_aux_ori" = "0x11"
78
79 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
80 register "typec_aux_bias_pads[2]" = "{.pad_auxp_dc = GPP_A19, .pad_auxn_dc = GPP_A20}"
81
82 register "serial_io_i2c_mode" = "{
83 [PchSerialIoIndexI2C0] = PchSerialIoPci,
84 [PchSerialIoIndexI2C1] = PchSerialIoPci,
85 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
86 [PchSerialIoIndexI2C3] = PchSerialIoDisabled,
87 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
88 [PchSerialIoIndexI2C5] = PchSerialIoPci,
89 }"
90
91 register "serial_io_gspi_mode" = "{
92 [PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
93 [PchSerialIoIndexGSPI1] = PchSerialIoDisabled,
94 }"
95
96 # Intel Common SoC Config
97 #+-------------------+---------------------------+
98 #| Field | Value |
99 #+-------------------+---------------------------+
100 #| I2C0 | Audio |
101 #| I2C1 | cr50 TPM. Early init is |
102 #| | required to set up a BAR |
103 #| | for TPM communication |
104 #| I2C5 | Trackpad |
105 #+-------------------+---------------------------+
106 register "common_soc_config" = "{
107 .i2c[0]= {
108 .speed = I2C_SPEED_FAST,
109 .rise_time_ns = 175,
110 .fall_time_ns = 8,
111 },
112 .i2c[1] = {
113 .early_init = 1,
114 .speed = I2C_SPEED_FAST,
115 .rise_time_ns = 600,
116 .fall_time_ns = 400,
117 .data_hold_time_ns = 50,
118 },
119 .i2c[5] = {
120 .speed = I2C_SPEED_FAST,
121 .rise_time_ns = 650,
122 .fall_time_ns = 400,
123 .data_hold_time_ns = 50,
124 },
125 }"
126
127 device domain 0 on
128 device ref igpu on
129 chip drivers/gfx/generic
130 register "device_count" = "6"
131 # DDIA for eDP
132 register "device[0].name" = ""LCD""
133 # DDIB for HDMI
134 register "device[1].name" = ""DD01""
135 # TCP0 (DP-1) for port C0
136 register "device[2].name" = ""DD02""
137 register "device[2].use_pld" = "true"
138 register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
139 # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1
140 register "device[3].name" = ""DD03""
141 # TCP2 (DP-3) for port C2
142 register "device[4].name" = ""DD04""
143 register "device[4].use_pld" = "true"
144 register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
145 # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
146 register "device[5].name" = ""DD05""
147 device generic 0 on end
148 end
149 end # Integrated Graphics Device
150 device ref dtt on
151 chip drivers/intel/dptf
152 ## sensor information
153 register "options.tsr[0].desc" = ""DRAM_SOC""
154 register "options.tsr[1].desc" = ""Ambient""
155 register "options.tsr[2].desc" = ""Charger""
156
157 # TODO: below values are initial reference values only
158 ## Active Policy
159 register "policies.active" = "{
160 [0] = {
161 .target = DPTF_TEMP_SENSOR_0,
162 .thresholds = {
163 TEMP_PCT(75, 97),
164 TEMP_PCT(70, 93),
165 TEMP_PCT(60, 86),
166 TEMP_PCT(52, 80),
167 TEMP_PCT(47, 64),
168 TEMP_PCT(43, 52),
169 TEMP_PCT(40, 40),
170 }
171 },
172 [1] = {
173 .target = DPTF_TEMP_SENSOR_1,
174 .thresholds = {
175 TEMP_PCT(75, 97),
176 TEMP_PCT(70, 93),
177 TEMP_PCT(60, 86),
178 TEMP_PCT(52, 80),
179 TEMP_PCT(47, 64),
180 TEMP_PCT(43, 52),
181 TEMP_PCT(40, 40),
182 }
183 },
184 [2] = {
185 .target = DPTF_TEMP_SENSOR_2,
186 .thresholds = {
187 TEMP_PCT(82, 97),
188 TEMP_PCT(78, 93),
189 TEMP_PCT(72, 86),
190 TEMP_PCT(60, 80),
191 }
192 }
193 }"
194
195 ## Passive Policy
196 register "policies.passive" = "{
197 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
198 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000),
199 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 5000),
200 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
201 }"
202
203 ## Critical Policy
204 register "policies.critical" = "{
Seunghwan Kima2f47bb2024-02-08 10:01:35 +0900205 [0] = DPTF_CRITICAL(CPU, 99, SHUTDOWN),
Seunghwan Kim49d9b182024-02-02 09:17:57 +0900206 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
207 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
208 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
209 }"
210
211 register "controls.power_limits" = "{
212 .pl1 = {
213 .min_power = 15000,
214 .max_power = 15000,
215 .time_window_min = 28 * MSECS_PER_SEC,
216 .time_window_max = 32 * MSECS_PER_SEC,
217 .granularity = 200,
218 },
219 .pl2 = {
220 .min_power = 55000,
221 .max_power = 55000,
222 .time_window_min = 28 * MSECS_PER_SEC,
223 .time_window_max = 32 * MSECS_PER_SEC,
224 .granularity = 1000,
225 }
226 }"
227
228 ## Charger Performance Control (Control, mA)
229 register "controls.charger_perf" = "{
230 [0] = { 255, 1700 },
231 [1] = { 24, 1500 },
232 [2] = { 16, 1000 },
233 [3] = { 8, 500 }
234 }"
235
236 ## Fan Performance Control (Percent, Speed, Noise, Power)
237 register "controls.fan_perf" = "{
238 [0] = { 90, 6700, 220, 2200, },
239 [1] = { 80, 5800, 180, 1800, },
240 [2] = { 70, 5000, 145, 1450, },
241 [3] = { 60, 4900, 115, 1150, },
242 [4] = { 50, 3838, 90, 900, },
243 [5] = { 40, 2904, 55, 550, },
244 [6] = { 30, 2337, 30, 300, },
245 [7] = { 20, 1608, 15, 150, },
246 [8] = { 10, 800, 10, 100, },
247 [9] = { 0, 0, 0, 50, }
248 }"
249
250 ## Fan options
251 register "options.fan.fine_grained_control" = "1"
252 register "options.fan.step_size" = "2"
253
254 device generic 0 alias dptf_policy on end
255 end
256 end
257 device ref pcie4_0 on
258 # Enable CPU PCIE RP 1 using CLK 1
259 register "cpu_pcie_rp[CPU_RP(1)]" = "{
260 .clk_req = 1,
261 .clk_src = 1,
262 .flags = PCIE_RP_LTR | PCIE_RP_AER,
263 }"
264 end # SSD
265 device ref tbt_pcie_rp0 off end
266 device ref tbt_pcie_rp1 off end
267 device ref tbt_pcie_rp2 off end
268 device ref tbt_pcie_rp3 off end
269 device ref tcss_dma0 off end
270 device ref tcss_dma1 off end
271 device ref ish on
272 chip drivers/intel/ish
273 register "add_acpi_dma_property" = "true"
274 device generic 0 on end
275 end
276 end
277 device ref ufs on end
278 device ref cnvi_wifi on
279 chip drivers/wifi/generic
280 register "wake" = "GPE0_PME_B0"
281 register "enable_cnvi_ddr_rfim" = "true"
282 device generic 0 on end
283 end
284 end
285 device ref i2c0 on
286 chip drivers/i2c/da7219
287 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
288 register "btn_cfg" = "50"
289 register "mic_det_thr" = "200"
290 register "jack_ins_deb" = "20"
291 register "jack_det_rate" = ""32ms_64ms""
292 register "jack_rem_deb" = "1"
293 register "a_d_btn_thr" = "0xa"
294 register "d_b_btn_thr" = "0x16"
295 register "b_c_btn_thr" = "0x21"
296 register "c_mic_btn_thr" = "0x3e"
297 register "btn_avg" = "4"
298 register "adc_1bit_rpt" = "1"
299 register "micbias_lvl" = "2600"
300 register "mic_amp_in_sel" = ""diff""
301 device i2c 1a on end
302 end
303 end #I2C0
304 device ref i2c1 on
305 chip drivers/i2c/tpm
306 register "hid" = ""GOOG0005""
307 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
308 device i2c 50 on end
309 end
310 end #I2C1
311 device ref i2c5 on
312 chip drivers/i2c/hid
313 register "generic.hid" = ""ZNT0000""
314 register "generic.desc" = ""Zinitix Touchpad""
315 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
316 register "generic.wake" = "GPE0_DW2_14"
317 register "generic.detect" = "1"
318 register "hid_desc_reg_offset" = "0xE"
319 device i2c 40 on end
320 end
321 end #I2C5
322 device ref hda on
323 chip drivers/generic/max98357a
324 register "hid" = ""MX98360A""
325 register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
326 register "sdmode_delay" = "5"
327 device generic 0 on end
328 end
329 chip drivers/sof
330 register "spkr_tplg" = "max98360a"
331 register "jack_tplg" = "da7219"
332 register "mic_tplg" = "_2ch_pdm0"
333 device generic 0 on end
334 end
335
336 end
337 device ref pch_espi on
338 chip ec/google/chromeec
339 use conn0 as mux_conn[0]
340 use conn1 as mux_conn[1]
341 device pnp 0c09.0 on end
342 end
343 end
344 device ref pmc hidden
345 chip drivers/intel/pmc_mux
346 device generic 0 on
347 chip drivers/intel/pmc_mux/conn
348 use usb2_port1 as usb2_port
349 use tcss_usb3_port1 as usb3_port
350 device generic 0 alias conn0 on end
351 end
352 chip drivers/intel/pmc_mux/conn
353 use usb2_port3 as usb2_port
354 use tcss_usb3_port3 as usb3_port
355 device generic 1 alias conn1 on end
356 end
357 end
358 end
359 end
360 device ref tcss_xhci on
361 chip drivers/usb/acpi
362 device ref tcss_root_hub on
363 chip drivers/usb/acpi
364 register "desc" = ""USB3 Type-C Port C0 (MLB)""
365 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
366 register "use_custom_pld" = "true"
367 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
368 device ref tcss_usb3_port1 on end
369 end
370 chip drivers/usb/acpi
371 register "desc" = ""USB3 Type-C Port C2 (MLB)""
372 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
373 register "use_custom_pld" = "true"
374 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
375 device ref tcss_usb3_port3 on end
376 end
377 end
378 end
379 end
380 device ref xhci on
381 chip drivers/usb/acpi
382 device ref xhci_root_hub on
383 chip drivers/usb/acpi
384 register "desc" = ""USB2 Type-C Port C0 (MLB)""
385 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
386 register "use_custom_pld" = "true"
387 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
388 device ref usb2_port1 on end
389 end
390 chip drivers/usb/acpi
391 register "desc" = ""USB2 Type-C Port C2 (MLB)""
392 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
393 register "use_custom_pld" = "true"
394 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
395 device ref usb2_port3 on end
396 end
397 chip drivers/usb/acpi
398 register "desc" = ""USB2 MMC""
399 register "type" = "UPC_TYPE_EXPRESSCARD"
400 device ref usb2_port4 on end
401 end
402 chip drivers/usb/acpi
403 register "desc" = ""USB2 Type-A Port A1 (DB)""
404 register "type" = "UPC_TYPE_A"
405 register "use_custom_pld" = "true"
406 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
407 device ref usb2_port5 on end
408 end
409 chip drivers/usb/acpi
410 register "desc" = ""USB2 Camera""
411 register "type" = "UPC_TYPE_INTERNAL"
412 device ref usb2_port6 on end
413 end
414 chip drivers/usb/acpi
415 register "desc" = ""USB2 Bluetooth""
416 register "type" = "UPC_TYPE_INTERNAL"
417 register "reset_gpio" =
418 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
419 device ref usb2_port10 on end
420 end
421 chip drivers/usb/acpi
422 register "desc" = ""USB3 Type-A Port A1 (DB)""
423 register "type" = "UPC_TYPE_USB3_A"
424 register "use_custom_pld" = "true"
425 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
426 device ref usb3_port3 on end
427 end
428 end
429 end
430 end
431 end
YH Line4fb5e72024-01-12 01:27:40 +0000432end