Seunghwan Kim | 49d9b18 | 2024-02-02 09:17:57 +0900 | [diff] [blame^] | 1 | |
YH Lin | e4fb5e7 | 2024-01-12 01:27:40 +0000 | [diff] [blame] | 2 | chip soc/intel/alderlake |
Seunghwan Kim | 49d9b18 | 2024-02-02 09:17:57 +0900 | [diff] [blame^] | 3 | register "domain_vr_config[VR_DOMAIN_IA]" = "{ |
| 4 | .enable_fast_vmode = 1, |
| 5 | }" |
YH Lin | e4fb5e7 | 2024-01-12 01:27:40 +0000 | [diff] [blame] | 6 | |
Seunghwan Kim | 49d9b18 | 2024-02-02 09:17:57 +0900 | [diff] [blame^] | 7 | register "sagv" = "SaGv_Enabled" |
YH Lin | e4fb5e7 | 2024-01-12 01:27:40 +0000 | [diff] [blame] | 8 | |
Seunghwan Kim | 49d9b18 | 2024-02-02 09:17:57 +0900 | [diff] [blame^] | 9 | register "pch_slp_a_min_assertion_width" = "SLP_A_ASSERTION_DEFAULT" |
| 10 | |
| 11 | # As per Intel Advisory doc#723158, the change is required to prevent possible |
| 12 | # display flickering issue. |
| 13 | register "disable_dynamic_tccold_handshake" = "true" |
| 14 | |
| 15 | register "platform_pmax" = "145" |
| 16 | |
| 17 | register "usb2_ports[0]" = "{ |
| 18 | .enable = 1, |
| 19 | .ocpin = OC0, |
| 20 | .pre_emp_bias = USB2_BIAS_28P15MV, |
| 21 | .tx_bias = USB2_BIAS_0MV, |
| 22 | .tx_emp_enable = USB2_PRE_EMP_ON, |
| 23 | .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, |
| 24 | .type_c = 1, |
| 25 | }" # USB2_C0 |
| 26 | register "usb2_ports[1]" = "USB2_PORT_EMPTY" |
| 27 | register "usb2_ports[2]" = "{ |
| 28 | .enable = 1, |
| 29 | .ocpin = OC_SKIP, |
| 30 | .pre_emp_bias = USB2_BIAS_28P15MV, |
| 31 | .tx_bias = USB2_BIAS_0MV, |
| 32 | .tx_emp_enable = USB2_PRE_EMP_ON, |
| 33 | .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, |
| 34 | .type_c = 1, |
| 35 | }" # USB2_C2 |
| 36 | register "usb2_ports[3]" = "{ |
| 37 | .enable = 1, |
| 38 | .ocpin = OC_SKIP, |
| 39 | .pre_emp_bias = USB2_BIAS_28P15MV, |
| 40 | .tx_bias = USB2_BIAS_0MV, |
| 41 | .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON, |
| 42 | .pre_emp_bit = USB2_FULL_BIT_PRE_EMP, |
| 43 | }" # uSD |
| 44 | register "usb2_ports[4]" = "{ |
| 45 | .enable = 1, |
| 46 | .ocpin = OC_SKIP, |
| 47 | .pre_emp_bias = USB2_BIAS_28P15MV, |
| 48 | .tx_bias = USB2_BIAS_11P25MV, |
| 49 | .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON, |
| 50 | .pre_emp_bit = USB2_FULL_BIT_PRE_EMP, |
| 51 | }" # USB2_A1 |
| 52 | register "usb2_ports[5]" = "{ |
| 53 | .enable = 1, |
| 54 | .ocpin = OC_SKIP, |
| 55 | .pre_emp_bias = USB2_BIAS_28P15MV, |
| 56 | .tx_bias = USB2_BIAS_0MV, |
| 57 | .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON, |
| 58 | .pre_emp_bit = USB2_FULL_BIT_PRE_EMP, |
| 59 | }" # Camera |
| 60 | register "usb2_ports[6]" = "USB2_PORT_EMPTY" |
| 61 | register "usb2_ports[7]" = "USB2_PORT_EMPTY" |
| 62 | register "usb2_ports[8]" = "USB2_PORT_EMPTY" |
| 63 | register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth |
| 64 | |
| 65 | register "usb3_ports[0]" = "USB3_PORT_EMPTY" |
| 66 | register "usb3_ports[1]" = "USB3_PORT_EMPTY" |
| 67 | register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3_A1 |
| 68 | register "usb3_ports[3]" = "USB3_PORT_EMPTY" |
| 69 | |
| 70 | register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC0)" |
| 71 | register "tcss_ports[1]" = "TCSS_PORT_EMPTY" |
| 72 | register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC_SKIP)" |
| 73 | register "tcss_ports[3]" = "TCSS_PORT_EMPTY" |
| 74 | |
| 75 | register "tcss_aux_ori" = "0x11" |
| 76 | |
| 77 | register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" |
| 78 | register "typec_aux_bias_pads[2]" = "{.pad_auxp_dc = GPP_A19, .pad_auxn_dc = GPP_A20}" |
| 79 | |
| 80 | register "serial_io_i2c_mode" = "{ |
| 81 | [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| 82 | [PchSerialIoIndexI2C1] = PchSerialIoPci, |
| 83 | [PchSerialIoIndexI2C2] = PchSerialIoDisabled, |
| 84 | [PchSerialIoIndexI2C3] = PchSerialIoDisabled, |
| 85 | [PchSerialIoIndexI2C4] = PchSerialIoDisabled, |
| 86 | [PchSerialIoIndexI2C5] = PchSerialIoPci, |
| 87 | }" |
| 88 | |
| 89 | register "serial_io_gspi_mode" = "{ |
| 90 | [PchSerialIoIndexGSPI0] = PchSerialIoDisabled, |
| 91 | [PchSerialIoIndexGSPI1] = PchSerialIoDisabled, |
| 92 | }" |
| 93 | |
| 94 | # Intel Common SoC Config |
| 95 | #+-------------------+---------------------------+ |
| 96 | #| Field | Value | |
| 97 | #+-------------------+---------------------------+ |
| 98 | #| I2C0 | Audio | |
| 99 | #| I2C1 | cr50 TPM. Early init is | |
| 100 | #| | required to set up a BAR | |
| 101 | #| | for TPM communication | |
| 102 | #| I2C5 | Trackpad | |
| 103 | #+-------------------+---------------------------+ |
| 104 | register "common_soc_config" = "{ |
| 105 | .i2c[0]= { |
| 106 | .speed = I2C_SPEED_FAST, |
| 107 | .rise_time_ns = 175, |
| 108 | .fall_time_ns = 8, |
| 109 | }, |
| 110 | .i2c[1] = { |
| 111 | .early_init = 1, |
| 112 | .speed = I2C_SPEED_FAST, |
| 113 | .rise_time_ns = 600, |
| 114 | .fall_time_ns = 400, |
| 115 | .data_hold_time_ns = 50, |
| 116 | }, |
| 117 | .i2c[5] = { |
| 118 | .speed = I2C_SPEED_FAST, |
| 119 | .rise_time_ns = 650, |
| 120 | .fall_time_ns = 400, |
| 121 | .data_hold_time_ns = 50, |
| 122 | }, |
| 123 | }" |
| 124 | |
| 125 | device domain 0 on |
| 126 | device ref igpu on |
| 127 | chip drivers/gfx/generic |
| 128 | register "device_count" = "6" |
| 129 | # DDIA for eDP |
| 130 | register "device[0].name" = ""LCD"" |
| 131 | # DDIB for HDMI |
| 132 | register "device[1].name" = ""DD01"" |
| 133 | # TCP0 (DP-1) for port C0 |
| 134 | register "device[2].name" = ""DD02"" |
| 135 | register "device[2].use_pld" = "true" |
| 136 | register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" |
| 137 | # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1 |
| 138 | register "device[3].name" = ""DD03"" |
| 139 | # TCP2 (DP-3) for port C2 |
| 140 | register "device[4].name" = ""DD04"" |
| 141 | register "device[4].use_pld" = "true" |
| 142 | register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))" |
| 143 | # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 |
| 144 | register "device[5].name" = ""DD05"" |
| 145 | device generic 0 on end |
| 146 | end |
| 147 | end # Integrated Graphics Device |
| 148 | device ref dtt on |
| 149 | chip drivers/intel/dptf |
| 150 | ## sensor information |
| 151 | register "options.tsr[0].desc" = ""DRAM_SOC"" |
| 152 | register "options.tsr[1].desc" = ""Ambient"" |
| 153 | register "options.tsr[2].desc" = ""Charger"" |
| 154 | |
| 155 | # TODO: below values are initial reference values only |
| 156 | ## Active Policy |
| 157 | register "policies.active" = "{ |
| 158 | [0] = { |
| 159 | .target = DPTF_TEMP_SENSOR_0, |
| 160 | .thresholds = { |
| 161 | TEMP_PCT(75, 97), |
| 162 | TEMP_PCT(70, 93), |
| 163 | TEMP_PCT(60, 86), |
| 164 | TEMP_PCT(52, 80), |
| 165 | TEMP_PCT(47, 64), |
| 166 | TEMP_PCT(43, 52), |
| 167 | TEMP_PCT(40, 40), |
| 168 | } |
| 169 | }, |
| 170 | [1] = { |
| 171 | .target = DPTF_TEMP_SENSOR_1, |
| 172 | .thresholds = { |
| 173 | TEMP_PCT(75, 97), |
| 174 | TEMP_PCT(70, 93), |
| 175 | TEMP_PCT(60, 86), |
| 176 | TEMP_PCT(52, 80), |
| 177 | TEMP_PCT(47, 64), |
| 178 | TEMP_PCT(43, 52), |
| 179 | TEMP_PCT(40, 40), |
| 180 | } |
| 181 | }, |
| 182 | [2] = { |
| 183 | .target = DPTF_TEMP_SENSOR_2, |
| 184 | .thresholds = { |
| 185 | TEMP_PCT(82, 97), |
| 186 | TEMP_PCT(78, 93), |
| 187 | TEMP_PCT(72, 86), |
| 188 | TEMP_PCT(60, 80), |
| 189 | } |
| 190 | } |
| 191 | }" |
| 192 | |
| 193 | ## Passive Policy |
| 194 | register "policies.passive" = "{ |
| 195 | [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), |
| 196 | [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000), |
| 197 | [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 5000), |
| 198 | [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000), |
| 199 | }" |
| 200 | |
| 201 | ## Critical Policy |
| 202 | register "policies.critical" = "{ |
| 203 | [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), |
| 204 | [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN), |
| 205 | [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN), |
| 206 | [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN), |
| 207 | }" |
| 208 | |
| 209 | register "controls.power_limits" = "{ |
| 210 | .pl1 = { |
| 211 | .min_power = 15000, |
| 212 | .max_power = 15000, |
| 213 | .time_window_min = 28 * MSECS_PER_SEC, |
| 214 | .time_window_max = 32 * MSECS_PER_SEC, |
| 215 | .granularity = 200, |
| 216 | }, |
| 217 | .pl2 = { |
| 218 | .min_power = 55000, |
| 219 | .max_power = 55000, |
| 220 | .time_window_min = 28 * MSECS_PER_SEC, |
| 221 | .time_window_max = 32 * MSECS_PER_SEC, |
| 222 | .granularity = 1000, |
| 223 | } |
| 224 | }" |
| 225 | |
| 226 | ## Charger Performance Control (Control, mA) |
| 227 | register "controls.charger_perf" = "{ |
| 228 | [0] = { 255, 1700 }, |
| 229 | [1] = { 24, 1500 }, |
| 230 | [2] = { 16, 1000 }, |
| 231 | [3] = { 8, 500 } |
| 232 | }" |
| 233 | |
| 234 | ## Fan Performance Control (Percent, Speed, Noise, Power) |
| 235 | register "controls.fan_perf" = "{ |
| 236 | [0] = { 90, 6700, 220, 2200, }, |
| 237 | [1] = { 80, 5800, 180, 1800, }, |
| 238 | [2] = { 70, 5000, 145, 1450, }, |
| 239 | [3] = { 60, 4900, 115, 1150, }, |
| 240 | [4] = { 50, 3838, 90, 900, }, |
| 241 | [5] = { 40, 2904, 55, 550, }, |
| 242 | [6] = { 30, 2337, 30, 300, }, |
| 243 | [7] = { 20, 1608, 15, 150, }, |
| 244 | [8] = { 10, 800, 10, 100, }, |
| 245 | [9] = { 0, 0, 0, 50, } |
| 246 | }" |
| 247 | |
| 248 | ## Fan options |
| 249 | register "options.fan.fine_grained_control" = "1" |
| 250 | register "options.fan.step_size" = "2" |
| 251 | |
| 252 | device generic 0 alias dptf_policy on end |
| 253 | end |
| 254 | end |
| 255 | device ref pcie4_0 on |
| 256 | # Enable CPU PCIE RP 1 using CLK 1 |
| 257 | register "cpu_pcie_rp[CPU_RP(1)]" = "{ |
| 258 | .clk_req = 1, |
| 259 | .clk_src = 1, |
| 260 | .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| 261 | }" |
| 262 | end # SSD |
| 263 | device ref tbt_pcie_rp0 off end |
| 264 | device ref tbt_pcie_rp1 off end |
| 265 | device ref tbt_pcie_rp2 off end |
| 266 | device ref tbt_pcie_rp3 off end |
| 267 | device ref tcss_dma0 off end |
| 268 | device ref tcss_dma1 off end |
| 269 | device ref ish on |
| 270 | chip drivers/intel/ish |
| 271 | register "add_acpi_dma_property" = "true" |
| 272 | device generic 0 on end |
| 273 | end |
| 274 | end |
| 275 | device ref ufs on end |
| 276 | device ref cnvi_wifi on |
| 277 | chip drivers/wifi/generic |
| 278 | register "wake" = "GPE0_PME_B0" |
| 279 | register "enable_cnvi_ddr_rfim" = "true" |
| 280 | device generic 0 on end |
| 281 | end |
| 282 | end |
| 283 | device ref i2c0 on |
| 284 | chip drivers/i2c/da7219 |
| 285 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)" |
| 286 | register "btn_cfg" = "50" |
| 287 | register "mic_det_thr" = "200" |
| 288 | register "jack_ins_deb" = "20" |
| 289 | register "jack_det_rate" = ""32ms_64ms"" |
| 290 | register "jack_rem_deb" = "1" |
| 291 | register "a_d_btn_thr" = "0xa" |
| 292 | register "d_b_btn_thr" = "0x16" |
| 293 | register "b_c_btn_thr" = "0x21" |
| 294 | register "c_mic_btn_thr" = "0x3e" |
| 295 | register "btn_avg" = "4" |
| 296 | register "adc_1bit_rpt" = "1" |
| 297 | register "micbias_lvl" = "2600" |
| 298 | register "mic_amp_in_sel" = ""diff"" |
| 299 | device i2c 1a on end |
| 300 | end |
| 301 | end #I2C0 |
| 302 | device ref i2c1 on |
| 303 | chip drivers/i2c/tpm |
| 304 | register "hid" = ""GOOG0005"" |
| 305 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)" |
| 306 | device i2c 50 on end |
| 307 | end |
| 308 | end #I2C1 |
| 309 | device ref i2c5 on |
| 310 | chip drivers/i2c/hid |
| 311 | register "generic.hid" = ""ZNT0000"" |
| 312 | register "generic.desc" = ""Zinitix Touchpad"" |
| 313 | register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" |
| 314 | register "generic.wake" = "GPE0_DW2_14" |
| 315 | register "generic.detect" = "1" |
| 316 | register "hid_desc_reg_offset" = "0xE" |
| 317 | device i2c 40 on end |
| 318 | end |
| 319 | end #I2C5 |
| 320 | device ref hda on |
| 321 | chip drivers/generic/max98357a |
| 322 | register "hid" = ""MX98360A"" |
| 323 | register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)" |
| 324 | register "sdmode_delay" = "5" |
| 325 | device generic 0 on end |
| 326 | end |
| 327 | chip drivers/sof |
| 328 | register "spkr_tplg" = "max98360a" |
| 329 | register "jack_tplg" = "da7219" |
| 330 | register "mic_tplg" = "_2ch_pdm0" |
| 331 | device generic 0 on end |
| 332 | end |
| 333 | |
| 334 | end |
| 335 | device ref pch_espi on |
| 336 | chip ec/google/chromeec |
| 337 | use conn0 as mux_conn[0] |
| 338 | use conn1 as mux_conn[1] |
| 339 | device pnp 0c09.0 on end |
| 340 | end |
| 341 | end |
| 342 | device ref pmc hidden |
| 343 | chip drivers/intel/pmc_mux |
| 344 | device generic 0 on |
| 345 | chip drivers/intel/pmc_mux/conn |
| 346 | use usb2_port1 as usb2_port |
| 347 | use tcss_usb3_port1 as usb3_port |
| 348 | device generic 0 alias conn0 on end |
| 349 | end |
| 350 | chip drivers/intel/pmc_mux/conn |
| 351 | use usb2_port3 as usb2_port |
| 352 | use tcss_usb3_port3 as usb3_port |
| 353 | device generic 1 alias conn1 on end |
| 354 | end |
| 355 | end |
| 356 | end |
| 357 | end |
| 358 | device ref tcss_xhci on |
| 359 | chip drivers/usb/acpi |
| 360 | device ref tcss_root_hub on |
| 361 | chip drivers/usb/acpi |
| 362 | register "desc" = ""USB3 Type-C Port C0 (MLB)"" |
| 363 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 364 | register "use_custom_pld" = "true" |
| 365 | register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" |
| 366 | device ref tcss_usb3_port1 on end |
| 367 | end |
| 368 | chip drivers/usb/acpi |
| 369 | register "desc" = ""USB3 Type-C Port C2 (MLB)"" |
| 370 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 371 | register "use_custom_pld" = "true" |
| 372 | register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))" |
| 373 | device ref tcss_usb3_port3 on end |
| 374 | end |
| 375 | end |
| 376 | end |
| 377 | end |
| 378 | device ref xhci on |
| 379 | chip drivers/usb/acpi |
| 380 | device ref xhci_root_hub on |
| 381 | chip drivers/usb/acpi |
| 382 | register "desc" = ""USB2 Type-C Port C0 (MLB)"" |
| 383 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 384 | register "use_custom_pld" = "true" |
| 385 | register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" |
| 386 | device ref usb2_port1 on end |
| 387 | end |
| 388 | chip drivers/usb/acpi |
| 389 | register "desc" = ""USB2 Type-C Port C2 (MLB)"" |
| 390 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 391 | register "use_custom_pld" = "true" |
| 392 | register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))" |
| 393 | device ref usb2_port3 on end |
| 394 | end |
| 395 | chip drivers/usb/acpi |
| 396 | register "desc" = ""USB2 MMC"" |
| 397 | register "type" = "UPC_TYPE_EXPRESSCARD" |
| 398 | device ref usb2_port4 on end |
| 399 | end |
| 400 | chip drivers/usb/acpi |
| 401 | register "desc" = ""USB2 Type-A Port A1 (DB)"" |
| 402 | register "type" = "UPC_TYPE_A" |
| 403 | register "use_custom_pld" = "true" |
| 404 | register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" |
| 405 | device ref usb2_port5 on end |
| 406 | end |
| 407 | chip drivers/usb/acpi |
| 408 | register "desc" = ""USB2 Camera"" |
| 409 | register "type" = "UPC_TYPE_INTERNAL" |
| 410 | device ref usb2_port6 on end |
| 411 | end |
| 412 | chip drivers/usb/acpi |
| 413 | register "desc" = ""USB2 Bluetooth"" |
| 414 | register "type" = "UPC_TYPE_INTERNAL" |
| 415 | register "reset_gpio" = |
| 416 | "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" |
| 417 | device ref usb2_port10 on end |
| 418 | end |
| 419 | chip drivers/usb/acpi |
| 420 | register "desc" = ""USB3 Type-A Port A1 (DB)"" |
| 421 | register "type" = "UPC_TYPE_USB3_A" |
| 422 | register "use_custom_pld" = "true" |
| 423 | register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" |
| 424 | device ref usb3_port3 on end |
| 425 | end |
| 426 | end |
| 427 | end |
| 428 | end |
| 429 | end |
YH Lin | e4fb5e7 | 2024-01-12 01:27:40 +0000 | [diff] [blame] | 430 | end |