Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 2 | |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 3 | #include <device/mmio.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 4 | #include <device/pci_ops.h> |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 5 | #include <console/console.h> |
| 6 | #include <device/device.h> |
| 7 | #include <device/pci.h> |
| 8 | #include <device/pci_ids.h> |
Kyösti Mälkki | cbf9571 | 2020-01-05 08:05:45 +0200 | [diff] [blame] | 9 | #include <option.h> |
Furquan Shaikh | c0bff97 | 2020-04-30 19:19:33 -0700 | [diff] [blame] | 10 | #include <acpi/acpi_sata.h> |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 11 | #include <types.h> |
| 12 | |
Kyösti Mälkki | 12b121c | 2019-08-18 16:33:39 +0300 | [diff] [blame] | 13 | #include "chip.h" |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 14 | #include "pch.h" |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 15 | |
Vladimir Serbinenko | 4695705 | 2013-11-26 01:16:20 +0100 | [diff] [blame] | 16 | typedef struct southbridge_intel_ibexpeak_config config_t; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 17 | |
| 18 | static inline u32 sir_read(struct device *dev, int idx) |
| 19 | { |
| 20 | pci_write_config32(dev, SATA_SIRI, idx); |
| 21 | return pci_read_config32(dev, SATA_SIRD); |
| 22 | } |
| 23 | |
| 24 | static inline void sir_write(struct device *dev, int idx, u32 value) |
| 25 | { |
| 26 | pci_write_config32(dev, SATA_SIRI, idx); |
| 27 | pci_write_config32(dev, SATA_SIRD, value); |
| 28 | } |
| 29 | |
| 30 | static void sata_init(struct device *dev) |
| 31 | { |
| 32 | u32 reg32; |
| 33 | u16 reg16; |
| 34 | /* Get the chip configuration */ |
| 35 | config_t *config = dev->chip_info; |
| 36 | |
| 37 | printk(BIOS_DEBUG, "SATA: Initializing...\n"); |
| 38 | |
| 39 | if (config == NULL) { |
| 40 | printk(BIOS_ERR, "SATA: ERROR: Device not in devicetree.cb!\n"); |
| 41 | return; |
| 42 | } |
| 43 | |
Angel Pons | 0a93775 | 2021-04-19 13:01:09 +0200 | [diff] [blame] | 44 | /* Default to AHCI */ |
| 45 | u8 sata_mode = get_int_option("sata_mode", 0); |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 46 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 47 | /* SATA configuration */ |
| 48 | |
| 49 | /* Enable BARs */ |
Angel Pons | 89739ba | 2020-07-25 02:46:39 +0200 | [diff] [blame] | 50 | pci_write_config16(dev, PCI_COMMAND, |
| 51 | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 52 | |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 53 | if (sata_mode == 0) { |
| 54 | /* AHCI */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 55 | u32 *abar; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 56 | |
| 57 | printk(BIOS_DEBUG, "SATA: Controller in AHCI mode.\n"); |
| 58 | |
| 59 | /* Set Interrupt Line */ |
| 60 | /* Interrupt Pin is set by D31IP.PIP */ |
| 61 | pci_write_config8(dev, INTR_LN, 0x0b); |
| 62 | |
| 63 | /* Set timings */ |
Angel Pons | 959a448 | 2020-11-23 14:19:55 +0100 | [diff] [blame] | 64 | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE); |
| 65 | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 66 | |
| 67 | /* for AHCI, Port Enable is managed in memory mapped space */ |
| 68 | reg16 = pci_read_config16(dev, 0x92); |
| 69 | reg16 &= ~0x3f; /* 6 ports SKU + ORM */ |
| 70 | reg16 |= 0x8100 | config->sata_port_map; |
| 71 | pci_write_config16(dev, 0x92, reg16); |
| 72 | |
| 73 | /* SATA Initialization register */ |
| 74 | pci_write_config32(dev, 0x94, |
| 75 | ((config-> |
| 76 | sata_port_map ^ 0x3f) << 24) | 0x183 | |
| 77 | 0x40000000); |
| 78 | pci_write_config32(dev, 0x98, 0x00590200); |
| 79 | |
| 80 | /* Initialize AHCI memory-mapped space */ |
Patrick Rudolph | 819c206 | 2019-11-29 19:27:37 +0100 | [diff] [blame] | 81 | abar = (u32 *)(uintptr_t)pci_read_config32(dev, PCI_BASE_ADDRESS_5); |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 82 | printk(BIOS_DEBUG, "ABAR: %p\n", abar); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 83 | /* CAP (HBA Capabilities) : enable power management */ |
| 84 | reg32 = read32(abar + 0x00); |
| 85 | reg32 |= 0x0c006000; // set PSC+SSC+SALP+SSS |
| 86 | reg32 &= ~0x00020060; // clear SXS+EMS+PMS |
| 87 | /* Set ISS, if available */ |
| 88 | if (config->sata_interface_speed_support) { |
| 89 | reg32 &= ~0x00f00000; |
| 90 | reg32 |= (config->sata_interface_speed_support & 0x03) |
| 91 | << 20; |
| 92 | } |
| 93 | write32(abar + 0x00, reg32); |
| 94 | /* PI (Ports implemented) */ |
Kyösti Mälkki | 9b5f137 | 2015-02-24 11:53:06 +0200 | [diff] [blame] | 95 | write32(abar + 0x03, config->sata_port_map); |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 96 | (void)read32(abar + 0x03); /* Read back 1 */ |
| 97 | (void)read32(abar + 0x03); /* Read back 2 */ |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 98 | /* CAP2 (HBA Capabilities Extended) */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 99 | reg32 = read32(abar + 0x09); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 100 | reg32 &= ~0x00000002; |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 101 | write32(abar + 0x09, reg32); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 102 | /* VSP (Vendor Specific Register */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 103 | reg32 = read32(abar + 0x28); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 104 | reg32 &= ~0x00000005; |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 105 | write32(abar + 0x28, reg32); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 106 | } else { |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 107 | /* IDE */ |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 108 | printk(BIOS_DEBUG, "SATA: Controller in plain mode.\n"); |
| 109 | |
| 110 | /* No AHCI: clear AHCI base */ |
| 111 | pci_write_config32(dev, 0x24, 0x00000000); |
| 112 | |
| 113 | /* And without AHCI BAR no memory decoding */ |
| 114 | reg16 = pci_read_config16(dev, PCI_COMMAND); |
| 115 | reg16 &= ~PCI_COMMAND_MEMORY; |
| 116 | pci_write_config16(dev, PCI_COMMAND, reg16); |
| 117 | |
| 118 | /* Native mode capable on both primary and secondary (0xa) |
| 119 | * or'ed with enabled (0x50) = 0xf |
| 120 | */ |
| 121 | pci_write_config8(dev, 0x09, 0x8f); |
| 122 | |
| 123 | /* Set Interrupt Line */ |
| 124 | /* Interrupt Pin is set by D31IP.PIP */ |
| 125 | pci_write_config8(dev, INTR_LN, 0xff); |
| 126 | |
| 127 | /* Set timings */ |
Angel Pons | 959a448 | 2020-11-23 14:19:55 +0100 | [diff] [blame] | 128 | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE); |
| 129 | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 130 | |
| 131 | /* Port enable */ |
| 132 | reg16 = pci_read_config16(dev, 0x92); |
| 133 | reg16 &= ~0x3f; |
| 134 | reg16 |= config->sata_port_map; |
| 135 | pci_write_config16(dev, 0x92, reg16); |
| 136 | |
| 137 | /* SATA Initialization register */ |
| 138 | pci_write_config32(dev, 0x94, |
| 139 | ((config-> |
| 140 | sata_port_map ^ 0x3f) << 24) | 0x183); |
| 141 | } |
| 142 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 143 | /* Additional Programming Requirements */ |
| 144 | sir_write(dev, 0x04, 0x00000000); |
| 145 | sir_write(dev, 0x28, 0x0a000033); |
| 146 | reg32 = sir_read(dev, 0x54); |
| 147 | reg32 &= 0xff000000; |
| 148 | reg32 |= 0x555555; |
| 149 | sir_write(dev, 0x54, reg32); |
| 150 | sir_write(dev, 0x64, 0xcccccccc); |
| 151 | reg32 = sir_read(dev, 0x68); |
| 152 | reg32 &= 0xffff0000; |
| 153 | reg32 |= 0xcccc; |
| 154 | sir_write(dev, 0x68, reg32); |
| 155 | reg32 = sir_read(dev, 0x78); |
| 156 | reg32 &= 0x0000ffff; |
| 157 | reg32 |= 0x88880000; |
| 158 | sir_write(dev, 0x78, reg32); |
| 159 | sir_write(dev, 0x84, 0x001c7000); |
| 160 | sir_write(dev, 0x88, 0x88888888); |
| 161 | sir_write(dev, 0xa0, 0x001c7000); |
| 162 | // a4 |
| 163 | sir_write(dev, 0xc4, 0x0c0c0c0c); |
| 164 | sir_write(dev, 0xc8, 0x0c0c0c0c); |
| 165 | sir_write(dev, 0xd4, 0x10000000); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 166 | } |
| 167 | |
Elyes HAOUAS | be84140 | 2018-05-13 13:40:39 +0200 | [diff] [blame] | 168 | static void sata_enable(struct device *dev) |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 169 | { |
| 170 | /* Get the chip configuration */ |
| 171 | config_t *config = dev->chip_info; |
| 172 | u16 map = 0; |
| 173 | |
| 174 | if (!config) |
| 175 | return; |
| 176 | |
Angel Pons | 0a93775 | 2021-04-19 13:01:09 +0200 | [diff] [blame] | 177 | u8 sata_mode = get_int_option("sata_mode", 0); |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 178 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 179 | /* |
| 180 | * Set SATA controller mode early so the resource allocator can |
| 181 | * properly assign IO/Memory resources for the controller. |
| 182 | */ |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 183 | if (sata_mode == 0) |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 184 | map = 0x0060; |
| 185 | |
| 186 | map |= (config->sata_port_map ^ 0x3f) << 8; |
| 187 | |
| 188 | pci_write_config16(dev, 0x90, map); |
| 189 | } |
| 190 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 191 | static void sata_fill_ssdt(const struct device *dev) |
Alexander Couzens | beb31d0 | 2015-04-16 02:23:00 +0200 | [diff] [blame] | 192 | { |
| 193 | config_t *config = dev->chip_info; |
| 194 | generate_sata_ssdt_ports("\\_SB_.PCI0.SATA", config->sata_port_map); |
| 195 | } |
| 196 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 197 | static struct device_operations sata_ops = { |
| 198 | .read_resources = pci_dev_read_resources, |
| 199 | .set_resources = pci_dev_set_resources, |
| 200 | .enable_resources = pci_dev_enable_resources, |
| 201 | .init = sata_init, |
| 202 | .enable = sata_enable, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 203 | .acpi_fill_ssdt = sata_fill_ssdt, |
Angel Pons | 1fc0edd | 2020-05-31 00:03:28 +0200 | [diff] [blame] | 204 | .ops_pci = &pci_dev_ops_pci, |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 205 | }; |
| 206 | |
Felix Singer | 838fbc7 | 2019-11-21 21:23:32 +0100 | [diff] [blame] | 207 | static const unsigned short pci_device_ids[] = { |
| 208 | PCI_DID_INTEL_IBEXPEAK_MOBILE_SATA_IDE_1, |
| 209 | PCI_DID_INTEL_IBEXPEAK_MOBILE_SATA_AHCI, |
| 210 | PCI_DID_INTEL_IBEXPEAK_MOBILE_SATA_IDE_2, |
| 211 | 0 |
| 212 | }; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 213 | |
| 214 | static const struct pci_driver pch_sata __pci_driver = { |
| 215 | .ops = &sata_ops, |
| 216 | .vendor = PCI_VENDOR_ID_INTEL, |
| 217 | .devices = pci_device_ids, |
| 218 | }; |