blob: b584e9bd73fc41a67cbab1fb31d790d6b774bdcd [file] [log] [blame]
Patrick Georgiac959032020-05-05 22:49:26 +02001/* SPDX-License-Identifier: GPL-2.0-or-later */
Tristan Corrick44095c12018-12-22 00:04:18 +13002
3#include <console/console.h>
4#include <device/device.h>
Tristan Corrick44095c12018-12-22 00:04:18 +13005#include <option.h>
Tristan Corrick44095c12018-12-22 00:04:18 +13006#include <types.h>
7
8/*
9 * Hiding the AST2400 might be desirable to reduce attack surface.
10 *
11 * The PCIe root port that the AST2400 is on is disabled, but the
12 * AST2400 itself likely remains in an enabled state.
13 *
14 * The AST2400 is also attached to the LPC. That interface does not get
15 * disabled.
16 */
17static void hide_ast2400(void)
18{
Elyes HAOUASd2abe932019-01-23 14:18:34 +010019 struct device *dev = pcidev_on_root(0x1c, 0);
Tristan Corrick44095c12018-12-22 00:04:18 +130020 if (!dev)
21 return;
22
23 /*
24 * Marking this device as disabled means that the southbridge code
25 * will properly disable the root port when it configures it later.
26 */
27 dev->enabled = 0;
28 printk(BIOS_INFO, "The AST2400 is now set to be hidden.\n");
29}
30
31static void mainboard_enable(struct device *dev)
32{
Angel Ponsf8a5eb22020-11-02 22:49:51 +010033 if (get_int_option("hide_ast2400", false))
Tristan Corrick44095c12018-12-22 00:04:18 +130034 hide_ast2400();
35}
36
37struct chip_operations mainboard_ops = {
38 CHIP_NAME("X10SLM+-F")
39 .enable_dev = mainboard_enable,
40};