zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 14 | */ |
| 15 | |
Elyes HAOUAS | 65fa598 | 2014-07-22 23:12:38 +0200 | [diff] [blame] | 16 | #ifndef _HUDSON_EARLY_SETUP_C_ |
| 17 | #define _HUDSON_EARLY_SETUP_C_ |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 18 | |
| 19 | #include <stdint.h> |
Stefan Reinauer | 24d1d4b | 2013-03-21 11:51:41 -0700 | [diff] [blame] | 20 | #include <arch/io.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 21 | #include <device/pci_ops.h> |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 22 | #include <console/console.h> |
Kyösti Mälkki | a244d5e | 2019-12-09 08:08:58 +0200 | [diff] [blame^] | 23 | #include <amdblocks/acpimmio.h> |
Elyes HAOUAS | eb789f0 | 2018-10-27 16:40:25 +0200 | [diff] [blame] | 24 | |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 25 | #include "hudson.h" |
| 26 | |
Idwer Vollering | c18e521 | 2014-01-06 21:57:56 +0000 | [diff] [blame] | 27 | void hudson_pci_port80(void) |
| 28 | { |
| 29 | u8 byte; |
Antonello Dettori | 8d7181d | 2016-09-01 16:50:42 +0200 | [diff] [blame] | 30 | pci_devfn_t dev; |
Idwer Vollering | c18e521 | 2014-01-06 21:57:56 +0000 | [diff] [blame] | 31 | |
| 32 | /* P2P Bridge */ |
| 33 | dev = PCI_DEV(0, 0x14, 4); |
| 34 | |
| 35 | /* Chip Control: Enable subtractive decoding */ |
| 36 | byte = pci_read_config8(dev, 0x40); |
| 37 | byte |= 1 << 5; |
| 38 | pci_write_config8(dev, 0x40, byte); |
| 39 | |
| 40 | /* Misc Control: Enable subtractive decoding if 0x40 bit 5 is set */ |
| 41 | byte = pci_read_config8(dev, 0x4B); |
| 42 | byte |= 1 << 7; |
| 43 | pci_write_config8(dev, 0x4B, byte); |
| 44 | |
| 45 | /* The same IO Base and IO Limit here is meaningful because we set the |
| 46 | * bridge to be subtractive. During early setup stage, we have to make |
| 47 | * sure that data can go through port 0x80. |
| 48 | */ |
| 49 | /* IO Base: 0xf000 */ |
| 50 | byte = pci_read_config8(dev, 0x1C); |
| 51 | byte |= 0xF << 4; |
| 52 | pci_write_config8(dev, 0x1C, byte); |
| 53 | |
| 54 | /* IO Limit: 0xf000 */ |
| 55 | byte = pci_read_config8(dev, 0x1D); |
| 56 | byte |= 0xF << 4; |
| 57 | pci_write_config8(dev, 0x1D, byte); |
| 58 | |
| 59 | /* PCI Command: Enable IO response */ |
| 60 | byte = pci_read_config8(dev, 0x04); |
| 61 | byte |= 1 << 0; |
| 62 | pci_write_config8(dev, 0x04, byte); |
| 63 | |
| 64 | /* LPC controller */ |
| 65 | dev = PCI_DEV(0, 0x14, 3); |
| 66 | |
| 67 | byte = pci_read_config8(dev, 0x4A); |
| 68 | byte &= ~(1 << 5); /* disable lpc port 80 */ |
| 69 | pci_write_config8(dev, 0x4A, byte); |
| 70 | } |
| 71 | |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 72 | void hudson_lpc_port80(void) |
| 73 | { |
| 74 | u8 byte; |
Antonello Dettori | 8d7181d | 2016-09-01 16:50:42 +0200 | [diff] [blame] | 75 | pci_devfn_t dev; |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 76 | |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 77 | /* Enable port 80 LPC decode in pci function 3 configuration space. */ |
Idwer Vollering | c18e521 | 2014-01-06 21:57:56 +0000 | [diff] [blame] | 78 | dev = PCI_DEV(0, 0x14, 3); |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 79 | byte = pci_read_config8(dev, 0x4a); |
Idwer Vollering | c18e521 | 2014-01-06 21:57:56 +0000 | [diff] [blame] | 80 | byte |= 1 << 5; /* enable port 80 */ |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 81 | pci_write_config8(dev, 0x4a, byte); |
| 82 | } |
| 83 | |
Michał Żygowski | 8cee45c | 2019-11-23 18:03:46 +0100 | [diff] [blame] | 84 | void hudson_lpc_decode(void) |
| 85 | { |
| 86 | pci_devfn_t dev; |
| 87 | u32 tmp; |
| 88 | |
Kyösti Mälkki | a244d5e | 2019-12-09 08:08:58 +0200 | [diff] [blame^] | 89 | /* Enable LPC controller */ |
| 90 | pm_write8(0xec, pm_read8(0xec) | 0x01); |
| 91 | |
Michał Żygowski | 8cee45c | 2019-11-23 18:03:46 +0100 | [diff] [blame] | 92 | dev = PCI_DEV(0, 0x14, 3); |
| 93 | /* Serial port numeration on Hudson: |
| 94 | * PORT0 - 0x3f8 |
| 95 | * PORT1 - 0x2f8 |
| 96 | * PORT5 - 0x2e8 |
| 97 | * PORT7 - 0x3e8 |
| 98 | */ |
| 99 | tmp = DECODE_ENABLE_SERIAL_PORT0 | DECODE_ENABLE_SERIAL_PORT1 |
| 100 | | DECODE_ENABLE_SERIAL_PORT5 | DECODE_ENABLE_SERIAL_PORT7; |
| 101 | |
| 102 | pci_write_config32(dev, LPC_IO_PORT_DECODE_ENABLE, tmp); |
| 103 | } |
| 104 | |
Edward O'Callaghan | 893a55e | 2014-12-02 17:44:47 +1100 | [diff] [blame] | 105 | #endif /* _HUDSON_EARLY_SETUP_C_ */ |