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Stefan Reinauer85b0fa12010-12-17 00:08:21 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2003 Eric Biederman
5 * Copyright (C) 2006-2010 coresystems GmbH
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
Eric Biederman8ca8d762003-04-22 19:02:15 +000021#include <arch/io.h>
22#include <uart8250.h>
Stefan Reinauer85b0fa12010-12-17 00:08:21 +000023#include <pc80/mc146818rtc.h>
Rudolf Marek7f0e9302011-09-02 23:23:41 +020024#include <trace.h>
25
Stefan Reinauer85b0fa12010-12-17 00:08:21 +000026#if CONFIG_USE_OPTION_TABLE
27#include "option_table.h"
28#endif
Eric Biederman8ca8d762003-04-22 19:02:15 +000029
Stefan Reinauer85b0fa12010-12-17 00:08:21 +000030/* Should support 8250, 16450, 16550, 16550A type UARTs */
Eric Biederman8ca8d762003-04-22 19:02:15 +000031
Kyösti Mälkki9dd3ef12012-02-07 20:50:22 +020032/* Expected character delay at 1200bps is 9ms for a working UART
33 * and no flow-control. Assume UART as stuck if shift register
34 * or FIFO takes more than 50ms per character to appear empty.
35 *
36 * Estimated that inb() from UART takes 1 microsecond.
37 */
38#define SINGLE_CHAR_TIMEOUT (50 * 1000)
39#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
40
Eric Biederman69afe282004-11-11 06:53:24 +000041static inline int uart8250_can_tx_byte(unsigned base_port)
Eric Biederman8ca8d762003-04-22 19:02:15 +000042{
Kyösti Mälkki9dd3ef12012-02-07 20:50:22 +020043 return inb(base_port + UART_LSR) & UART_LSR_THRE;
Eric Biederman8ca8d762003-04-22 19:02:15 +000044}
45
46static inline void uart8250_wait_to_tx_byte(unsigned base_port)
47{
Kyösti Mälkki9dd3ef12012-02-07 20:50:22 +020048 unsigned long int i = SINGLE_CHAR_TIMEOUT;
49 while (i-- && !uart8250_can_tx_byte(base_port));
Eric Biederman8ca8d762003-04-22 19:02:15 +000050}
51
52static inline void uart8250_wait_until_sent(unsigned base_port)
53{
Kyösti Mälkki9dd3ef12012-02-07 20:50:22 +020054 unsigned long int i = FIFO_TIMEOUT;
55 while (i-- && !(inb(base_port + UART_LSR) & UART_LSR_TEMT));
Eric Biederman8ca8d762003-04-22 19:02:15 +000056}
57
58void uart8250_tx_byte(unsigned base_port, unsigned char data)
59{
60 uart8250_wait_to_tx_byte(base_port);
61 outb(data, base_port + UART_TBR);
Kevin O'Connora68555f2011-07-09 20:22:21 -040062}
63
64void uart8250_tx_flush(unsigned base_port)
65{
Eric Biederman8ca8d762003-04-22 19:02:15 +000066 uart8250_wait_until_sent(base_port);
67}
68
Greg Watsone54d55b2004-03-13 03:40:51 +000069int uart8250_can_rx_byte(unsigned base_port)
70{
Stefan Reinauer85b0fa12010-12-17 00:08:21 +000071 return inb(base_port + UART_LSR) & UART_LSR_DR;
Greg Watsone54d55b2004-03-13 03:40:51 +000072}
73
74unsigned char uart8250_rx_byte(unsigned base_port)
75{
Kyösti Mälkki9dd3ef12012-02-07 20:50:22 +020076 unsigned long int i = SINGLE_CHAR_TIMEOUT;
77 while (i-- && !uart8250_can_rx_byte(base_port));
78
79 if (i)
80 return inb(base_port + UART_RBR);
81 else
82 return 0x0;
Greg Watsone54d55b2004-03-13 03:40:51 +000083}
84
Stefan Reinauer85b0fa12010-12-17 00:08:21 +000085void uart8250_init(unsigned base_port, unsigned divisor)
Eric Biederman8ca8d762003-04-22 19:02:15 +000086{
Rudolf Marek7f0e9302011-09-02 23:23:41 +020087 DISABLE_TRACE;
Stefan Reinauer85b0fa12010-12-17 00:08:21 +000088 /* Disable interrupts */
Eric Biederman8ca8d762003-04-22 19:02:15 +000089 outb(0x0, base_port + UART_IER);
Stefan Reinauer85b0fa12010-12-17 00:08:21 +000090 /* Enable FIFOs */
91 outb(UART_FCR_FIFO_EN, base_port + UART_FCR);
92
Stefan Reinauerebafa4d2006-10-07 00:13:24 +000093 /* assert DTR and RTS so the other end is happy */
Stefan Reinauer85b0fa12010-12-17 00:08:21 +000094 outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR);
95
96 /* DLAB on */
97 outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR);
98
Kyösti Mälkki9dd3ef12012-02-07 20:50:22 +020099 /* Set Baud Rate Divisor. 12 ==> 9600 Baud */
Eric Biederman8ca8d762003-04-22 19:02:15 +0000100 outb(divisor & 0xFF, base_port + UART_DLL);
101 outb((divisor >> 8) & 0xFF, base_port + UART_DLM);
Stefan Reinauer85b0fa12010-12-17 00:08:21 +0000102
103 /* Set to 3 for 8N1 */
104 outb(CONFIG_TTYS0_LCS, base_port + UART_LCR);
Rudolf Marek7f0e9302011-09-02 23:23:41 +0200105 ENABLE_TRACE;
Eric Biederman8ca8d762003-04-22 19:02:15 +0000106}
Eric Biederman5cd81732004-03-11 15:01:31 +0000107
Stefan Reinauer85b0fa12010-12-17 00:08:21 +0000108void uart_init(void)
109{
Stefan Reinauer6aca1e82011-04-22 01:45:11 +0000110 /* TODO the divisor calculation is hard coded to standard UARTs. Some
111 * UARTs won't work with these values. This should be a property of the
112 * UART used, worst case a Kconfig variable. For now live with hard
113 * codes as the only devices that might be different are the iWave
114 * iRainbowG6 and the OXPCIe952 card (and the latter is memory mapped)
115 */
Stefan Reinauerf349d552011-04-22 02:17:26 +0000116 unsigned int div = (115200 / CONFIG_TTYS0_BAUD);
Stefan Reinauer85b0fa12010-12-17 00:08:21 +0000117
Stefan Reinauerf349d552011-04-22 02:17:26 +0000118#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
119 static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 };
120 unsigned b_index = 0;
121#if defined(__PRE_RAM__)
Patrick Georgib2517532011-05-10 21:53:13 +0000122 b_index = read_option(baud_rate, 0);
Stefan Reinauerf349d552011-04-22 02:17:26 +0000123 b_index &= 7;
Stefan Reinauerf5ce87d2011-04-22 02:32:03 +0000124 div = divisor[b_index];
Stefan Reinauer85b0fa12010-12-17 00:08:21 +0000125#else
Stefan Reinauerf349d552011-04-22 02:17:26 +0000126 if (get_option(&b_index, "baud_rate") == 0) {
127 div = divisor[b_index];
128 }
Stefan Reinauer85b0fa12010-12-17 00:08:21 +0000129#endif
Stefan Reinauerf349d552011-04-22 02:17:26 +0000130#endif
131
132 uart8250_init(CONFIG_TTYS0_BASE, div);
Stefan Reinauer85b0fa12010-12-17 00:08:21 +0000133}