blob: b764a8320ba2165ac5874e40ead90c432237f33c [file] [log] [blame]
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +02001chip northbridge/intel/sandybridge
2 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +02004
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
7
8 # Enable Panel as LVDS and configure power delays
Angel Ponsdc0c0812020-09-02 19:17:30 +02009 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020010 register "gpu_panel_power_cycle_delay" = "1"
11 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
12 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
13 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
14 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020015 register "gpu_cpu_backlight" = "0x1155"
16 register "gpu_pch_backlight" = "0x06100610"
17
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020018 device domain 0 on
Peter Lemenkovf15f3102019-11-27 12:04:42 +010019 subsystemid 0x17aa 0x21ce inherit
20
21 device pci 00.0 on end # host bridge
Patrick Rudolph830fdc72016-04-21 07:15:14 +020022 device pci 01.0 on end # PCIe Bridge for discrete graphics
Peter Lemenkovf15f3102019-11-27 12:04:42 +010023 device pci 02.0 on end # Integrated Graphics Controller
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020024
25 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
26 # GPI routing
27 # 0 No effect (default)
28 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
29 # 2 SCI (if corresponding GPIO_EN bit is also set)
30 register "alt_gp_smi_en" = "0x0000"
31 register "gpi1_routing" = "2"
32 register "gpi13_routing" = "2"
33
Iru Cai0bca3c92016-05-06 23:05:28 +080034 # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 3 (eSATA) & 4 (dock)
35 register "sata_port_map" = "0x1f"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020036 # Set max SATA speed to 6.0 Gb/s
37 register "sata_interface_speed_support" = "0x3"
38
39 register "gen1_dec" = "0x7c1601"
40 register "gen2_dec" = "0x0c15e1"
41 register "gen4_dec" = "0x0c06a1"
42
43 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
44
45 # Enable zero-based linear PCIe root port functions
Angel Ponsaf4bd562021-12-28 13:05:56 +010046 register "pcie_port_coalesce" = "true"
Peter Lemenkovf15f3102019-11-27 12:04:42 +010047
Patrick Rudolphc670a412017-04-28 17:28:32 +020048 # device specific SPI configuration
49 register "spi_uvscc" = "0x2005"
50 register "spi_lvscc" = "0x2005"
51
Evgeny Zinoviev72628fa2021-11-22 02:51:14 +030052 device pci 16.0 on end # Management Engine Interface 1
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020053 device pci 16.1 off end # Management Engine Interface 2
54 device pci 16.2 off end # Management Engine IDE-R
55 device pci 16.3 off end # Management Engine KT
Peter Lemenkovf15f3102019-11-27 12:04:42 +010056 device pci 19.0 on end # Intel Gigabit Ethernet
57 device pci 1a.0 on end # USB Enhanced Host Controller #2
58 device pci 1b.0 on end # High Definition Audio Controller
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020059 device pci 1c.0 off end # PCIe Port #1
Peter Lemenkovf15f3102019-11-27 12:04:42 +010060 device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020061 device pci 1c.2 off end # PCIe Port #3
62 device pci 1c.3 on
Patrick Rudolph05216322019-04-12 16:14:27 +020063 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020064 end # PCIe Port #4 ExpressCard
65 device pci 1c.4 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020066 chip drivers/ricoh/rce822
67 register "sdwppol" = "1"
68 register "disable_mask" = "0x87"
Peter Lemenkovf15f3102019-11-27 12:04:42 +010069 device pci 00.0 on end
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020070 end
71 end # PCIe Port #5 (Ricoh SD & FW)
72 device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
73 device pci 1c.6 off end # PCIe Port #7
74 device pci 1c.7 off end # PCIe Port #8
Peter Lemenkovf15f3102019-11-27 12:04:42 +010075 device pci 1d.0 on end # USB Enhanced Host Controller #1
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020076 device pci 1e.0 off end # PCI bridge
77 device pci 1f.0 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020078 chip ec/lenovo/pmh7
Peter Lemenkovf15f3102019-11-27 12:04:42 +010079 device pnp ff.1 on end # dummy
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +020080 register "backlight_enable" = "0x01"
81 register "dock_event_enable" = "0x01"
82 end
83
84 chip drivers/pc80/tpm
85 device pnp 0c31.0 on end
86 end
87
88 chip ec/lenovo/h8
89 device pnp ff.2 on # dummy
90 io 0x60 = 0x62
91 io 0x62 = 0x66
92 io 0x64 = 0x1600
93 io 0x66 = 0x1604
94 end
95
96 register "config0" = "0xa7"
97 register "config1" = "0x01"
98 register "config2" = "0xa0"
99 register "config3" = "0xe2"
100
101 register "has_keyboard_backlight" = "0"
102
103 register "beepmask0" = "0x02"
104 register "beepmask1" = "0x86"
105 register "has_power_management_beeps" = "1"
106 register "event2_enable" = "0xff"
107 register "event3_enable" = "0xff"
108 register "event4_enable" = "0xf0"
109 register "event5_enable" = "0x3c"
110 register "event6_enable" = "0x00"
111 register "event7_enable" = "0xa1"
112 register "event8_enable" = "0x7b"
113 register "event9_enable" = "0xff"
114 register "eventa_enable" = "0x00"
115 register "eventb_enable" = "0x00"
116 register "eventc_enable" = "0xff"
117 register "eventd_enable" = "0xff"
118 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200119
120 register "has_bdc_detection" = "1"
121 register "bdc_gpio_num" = "54"
122 register "bdc_gpio_lvl" = "0"
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200123 end
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200124 chip drivers/lenovo/hybrid_graphics
125 device pnp ff.f on end # dummy
126
127 register "detect_gpio" = "21"
128
129 register "has_panel_hybrid_gpio" = "1"
130 register "panel_hybrid_gpio" = "52"
131 register "panel_integrated_lvl" = "1"
132
133 register "has_backlight_gpio" = "0"
134 register "has_dgpu_power_gpio" = "0"
135
136 register "has_thinker1" = "1"
137 end
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200138 end # LPC Controller
Peter Lemenkovf15f3102019-11-27 12:04:42 +0100139 device pci 1f.2 on end # 6 port SATA AHCI Controller
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200140 device pci 1f.3 on
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200141 # eeprom, 8 virtual devices, same chip
142 chip drivers/i2c/at24rf08c
143 device i2c 54 on end
144 device i2c 55 on end
145 device i2c 56 on end
146 device i2c 57 on end
147 device i2c 5c on end
148 device i2c 5d on end
149 device i2c 5e on end
150 device i2c 5f on end
151 end
152 end # SMBus Controller
153 device pci 1f.5 off end # SATA Controller 2
Peter Lemenkovf15f3102019-11-27 12:04:42 +0100154 device pci 1f.6 on end # Thermal
Nicolas Reinecke2bffa8a2015-10-01 15:34:37 +0200155 end
156 end
157end