Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Corey Osgood <corey.osgood@gmail.com> |
| 5 | * Copyright (C) 2018 Eltan B.V. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 18 | #include <device/device.h> |
| 19 | #include <device/pnp.h> |
| 20 | #include <superio/conf_mode.h> |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 21 | #include <pc80/keyboard.h> |
Christian Walter | a8a9fb0 | 2019-06-06 15:09:49 +0200 | [diff] [blame] | 22 | #include <superio/common/ssdt.h> |
| 23 | #include <arch/acpi.h> |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 24 | #include "ast2400.h" |
| 25 | |
| 26 | static void ast2400_init(struct device *dev) |
| 27 | { |
| 28 | if (!dev->enabled) |
| 29 | return; |
| 30 | |
| 31 | switch (dev->path.pnp.device) { |
| 32 | case AST2400_KBC: |
| 33 | pc_keyboard_init(NO_AUX_DEVICE); |
| 34 | break; |
| 35 | } |
| 36 | } |
| 37 | |
Christian Walter | a8a9fb0 | 2019-06-06 15:09:49 +0200 | [diff] [blame] | 38 | #if CONFIG(HAVE_ACPI_TABLES) |
| 39 | /* Provide ACPI HIDs for generic Super I/O SSDT */ |
| 40 | static const char *ast2400_acpi_hid(const struct device *dev) |
| 41 | { |
| 42 | /* Sanity checks */ |
| 43 | if (dev->path.type != DEVICE_PATH_PNP) |
| 44 | return NULL; |
| 45 | if (dev->path.pnp.port == 0) |
| 46 | return NULL; |
| 47 | if ((dev->path.pnp.device & 0xff) > AST2400_MAILBOX) |
| 48 | return NULL; |
| 49 | |
| 50 | switch (dev->path.pnp.device & 0xff) { |
| 51 | case AST2400_SUART1: /* falltrough */ |
| 52 | case AST2400_SUART2: /* falltrough */ |
| 53 | case AST2400_SUART3: /* falltrough */ |
| 54 | case AST2400_SUART4: |
| 55 | return ACPI_HID_COM; |
| 56 | case AST2400_KBC: |
| 57 | return ACPI_HID_KEYBOARD; |
| 58 | default: |
| 59 | return ACPI_HID_PNP; |
| 60 | } |
| 61 | } |
| 62 | #endif |
| 63 | |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 64 | static struct device_operations ops = { |
| 65 | .read_resources = pnp_read_resources, |
| 66 | .set_resources = pnp_set_resources, |
| 67 | .enable_resources = pnp_enable_resources, |
| 68 | .enable = pnp_enable, |
| 69 | .init = ast2400_init, |
| 70 | .ops_pnp_mode = &pnp_conf_mode_a5a5_aa, |
Christian Walter | a8a9fb0 | 2019-06-06 15:09:49 +0200 | [diff] [blame] | 71 | #if CONFIG(HAVE_ACPI_TABLES) |
| 72 | .acpi_fill_ssdt_generator = superio_common_fill_ssdt_generator, |
| 73 | .acpi_name = superio_common_ldn_acpi_name, |
| 74 | .acpi_hid = ast2400_acpi_hid, |
| 75 | #endif |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 76 | }; |
| 77 | |
| 78 | static struct pnp_info pnp_dev_info[] = { |
| 79 | { NULL, AST2400_SUART1, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0xfff8, }, |
| 80 | { NULL, AST2400_SUART2, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0xfff8, }, |
| 81 | { NULL, AST2400_SWAK, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 |
| 82 | | PNP_IRQ0, 0xfff8, 0xfff8, 0xfff8, 0xfff8, }, |
| 83 | { NULL, AST2400_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1 |
| 84 | | PNP_MSC0, 0xffff, 0xffff, }, |
| 85 | { NULL, AST2400_GPIO, PNP_IRQ0, }, // GPIO LDN has no IO Region |
| 86 | { NULL, AST2400_SUART3, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0xfff8, }, |
| 87 | { NULL, AST2400_SUART4, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0xfff8, }, |
| 88 | { NULL, AST2400_ILPC2AHB, PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 | PNP_MSC2 |
| 89 | | PNP_MSC3 | PNP_MSC4 | PNP_MSC5 | PNP_MSC6 | PNP_MSC7 |
| 90 | | PNP_MSC8 | PNP_MSC9 | PNP_MSCA | PNP_MSCB | PNP_MSCC |
| 91 | | PNP_MSCD | PNP_MSCE, }, |
| 92 | { NULL, AST2400_MAILBOX, PNP_IO0 | PNP_IRQ0, 0xfffe, }, |
| 93 | }; |
| 94 | |
| 95 | static void enable_dev(struct device *dev) |
| 96 | { |
| 97 | pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), |
| 98 | pnp_dev_info); |
| 99 | } |
| 100 | |
| 101 | struct chip_operations superio_aspeed_ast2400_ops = { |
| 102 | CHIP_NAME("ASpeed AST2400 Super I/O") |
| 103 | .enable_dev = enable_dev, |
| 104 | }; |