blob: 465ef6636aa2fc1492a4d1c93b0425d2c23a741b [file] [log] [blame]
Stefan Reinauer474ff3d2015-11-04 22:41:47 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 * Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
6 * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
7 * Copyright (C) 2015 Matt DeVillier <matt.devillier@gmail.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Stefan Reinauer474ff3d2015-11-04 22:41:47 +020018 */
19
20#include <arch/io.h>
21#include <device/device.h>
22#include <device/pnp.h>
23#include <pc80/keyboard.h>
24#include <stdlib.h>
25#include <superio/conf_mode.h>
26
27#include "nct6779d.h"
28
29
30static void nct6779d_init(struct device *dev)
31{
32 if (!dev->enabled)
33 return;
34
35 switch(dev->path.pnp.device) {
36 /* TODO: Might potentially need code for HWM or FDC etc. */
37 case NCT6779D_KBC:
Timothy Pearson448e3862015-11-24 14:12:01 -060038 pc_keyboard_init(NO_AUX_DEVICE);
Stefan Reinauer474ff3d2015-11-04 22:41:47 +020039 break;
40 }
41}
42
43static struct device_operations ops = {
44 .read_resources = pnp_read_resources,
45 .set_resources = pnp_set_resources,
46 .enable_resources = pnp_enable_resources,
47 .enable = pnp_alt_enable,
48 .init = nct6779d_init,
49 .ops_pnp_mode = &pnp_conf_mode_8787_aa,
50};
51
52static struct pnp_info pnp_dev_info[] = {
Felix Held9911d642018-07-06 20:55:53 +020053 { NULL, NCT6779D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8, },
54 { NULL, NCT6779D_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
55 { NULL, NCT6779D_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
56 { NULL, NCT6779D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
57 0x0fff, 0x0fff, },
58 { NULL, NCT6779D_CIR, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
59 { NULL, NCT6779D_ACPI},
60 { NULL, NCT6779D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0,
61 0x0ffe, 0x0ffe, },
62 { NULL, NCT6779D_WDT1},
63 { NULL, NCT6779D_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
64 { NULL, NCT6779D_GPIO_PP_OD},
65 { NULL, NCT6779D_PRT80},
66 { NULL, NCT6779D_DSLP},
67 { NULL, NCT6779D_GPIOBASE, PNP_IO0, 0x0ff8, },
68 { NULL, NCT6779D_GPIO0},
69 { NULL, NCT6779D_GPIO1},
70 { NULL, NCT6779D_GPIO2},
71 { NULL, NCT6779D_GPIO3},
72 { NULL, NCT6779D_GPIO4},
73 { NULL, NCT6779D_GPIO5},
74 { NULL, NCT6779D_GPIO6},
75 { NULL, NCT6779D_GPIO7},
76 { NULL, NCT6779D_GPIO8},
Stefan Reinauer474ff3d2015-11-04 22:41:47 +020077};
78
79static void enable_dev(struct device *dev)
80{
81 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
82}
83
84struct chip_operations superio_nuvoton_nct6779d_ops = {
85 CHIP_NAME("NUVOTON NCT6779D Super I/O")
86 .enable_dev = enable_dev,
87};