commit 9911d64b9edb8c055b37b0635e97b4c585aa4ae1
author Felix Held <felix-coreboot@felixheld.de> Fri Jul 06 20:55:53 2018 +0200
committer Felix Held <felix-coreboot@felixheld.de> Wed Jul 18 11:40:20 2018 +0000
tree d823093f50b3945e11deba929f543a616113e57e
parent ad417c9c7b20529d20a72c81b225c29953439acc

superio/nuvoton: remove LDN-specific ops overrides

The pnp ops struct is already passed to the pnp_enable_devices function and it
is used if no override is supplied in the elements of the pnp_info struct array

Change-Id: I18345d7cc50a7d46cb15584dfb54df28e8534f81
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

src/superio/nuvoton/nct6779d/superio.c

diff --git a/src/superio/nuvoton/nct6779d/superio.c b/src/superio/nuvoton/nct6779d/superio.c
index 887ce7c..465ef66 100644
--- a/src/superio/nuvoton/nct6779d/superio.c
+++ b/src/superio/nuvoton/nct6779d/superio.c
@@ -50,28 +50,30 @@
 };
 
 static struct pnp_info pnp_dev_info[] = {
-	{ &ops, NCT6779D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8, },
-	{ &ops, NCT6779D_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
-	{ &ops, NCT6779D_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
-	{ &ops, NCT6779D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, 0x0fff, 0x0fff, },
-	{ &ops, NCT6779D_CIR, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
-	{ &ops, NCT6779D_ACPI},
-	{ &ops, NCT6779D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0ffe, 0x0ffe, },
-	{ &ops, NCT6779D_WDT1},
-	{ &ops, NCT6779D_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
-	{ &ops, NCT6779D_GPIO_PP_OD},
-	{ &ops, NCT6779D_PRT80},
-	{ &ops, NCT6779D_DSLP},
-	{ &ops, NCT6779D_GPIOBASE, PNP_IO0, 0x0ff8, },
-	{ &ops, NCT6779D_GPIO0},
-	{ &ops, NCT6779D_GPIO1},
-	{ &ops, NCT6779D_GPIO2},
-	{ &ops, NCT6779D_GPIO3},
-	{ &ops, NCT6779D_GPIO4},
-	{ &ops, NCT6779D_GPIO5},
-	{ &ops, NCT6779D_GPIO6},
-	{ &ops, NCT6779D_GPIO7},
-	{ &ops, NCT6779D_GPIO8},
+	{ NULL, NCT6779D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8, },
+	{ NULL, NCT6779D_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
+	{ NULL, NCT6779D_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
+	{ NULL, NCT6779D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
+		0x0fff, 0x0fff, },
+	{ NULL, NCT6779D_CIR, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
+	{ NULL, NCT6779D_ACPI},
+	{ NULL, NCT6779D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0,
+		0x0ffe, 0x0ffe, },
+	{ NULL, NCT6779D_WDT1},
+	{ NULL, NCT6779D_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
+	{ NULL, NCT6779D_GPIO_PP_OD},
+	{ NULL, NCT6779D_PRT80},
+	{ NULL, NCT6779D_DSLP},
+	{ NULL, NCT6779D_GPIOBASE, PNP_IO0, 0x0ff8, },
+	{ NULL, NCT6779D_GPIO0},
+	{ NULL, NCT6779D_GPIO1},
+	{ NULL, NCT6779D_GPIO2},
+	{ NULL, NCT6779D_GPIO3},
+	{ NULL, NCT6779D_GPIO4},
+	{ NULL, NCT6779D_GPIO5},
+	{ NULL, NCT6779D_GPIO6},
+	{ NULL, NCT6779D_GPIO7},
+	{ NULL, NCT6779D_GPIO8},
 };
 
 static void enable_dev(struct device *dev)