Zheng Bao | eff2ffd | 2010-03-16 01:38:54 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Zheng Bao | eff2ffd | 2010-03-16 01:38:54 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
Uwe Hermann | ff492b1 | 2010-09-24 23:37:25 +0000 | [diff] [blame] | 16 | #ifndef _SB700_SMBUS_C_ |
| 17 | #define _SB700_SMBUS_C_ |
Zheng Bao | eff2ffd | 2010-03-16 01:38:54 +0000 | [diff] [blame] | 18 | |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 19 | #include "smbus.h" |
Zheng Bao | eff2ffd | 2010-03-16 01:38:54 +0000 | [diff] [blame] | 20 | |
Timothy Pearson | acbdade | 2015-10-17 04:36:47 -0500 | [diff] [blame] | 21 | extern uint8_t amd_sb700_aux_smbus; |
| 22 | |
| 23 | void smbus_switch_to_channel(uint8_t channel_number); |
| 24 | uint8_t smbus_get_current_channel(void); |
| 25 | |
efdesign98 | 00c8c4a | 2011-07-20 12:37:58 -0600 | [diff] [blame] | 26 | void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val) |
| 27 | { |
| 28 | u32 tmp; |
| 29 | |
| 30 | outl((reg_space & 0x3) << 30 | reg_addr, AB_INDX); |
| 31 | tmp = inl(AB_DATA); |
| 32 | /* rpr 4.2 |
| 33 | * For certain revisions of the chip, the ABCFG registers, |
| 34 | * with an address of 0x100NN (where 'N' is any hexadecimal |
| 35 | * number), require an extra programming step.*/ |
| 36 | reg_addr & 0x10000 ? outl(0, AB_INDX) : NULL; |
| 37 | |
| 38 | tmp &= ~mask; |
| 39 | tmp |= val; |
| 40 | |
| 41 | /* printk(BIOS_DEBUG, "about write %x, index=%x", tmp, (reg_space&0x3)<<30 | reg_addr); */ |
Martin Roth | dcf253c | 2014-12-16 20:51:31 -0700 | [diff] [blame] | 42 | outl((reg_space & 0x3) << 30 | reg_addr, AB_INDX); /* probably we don't have to do it again. */ |
efdesign98 | 00c8c4a | 2011-07-20 12:37:58 -0600 | [diff] [blame] | 43 | outl(tmp, AB_DATA); |
| 44 | reg_addr & 0x10000 ? outl(0, AB_INDX) : NULL; |
| 45 | } |
| 46 | |
| 47 | /* space = 0: AX_INDXC, AX_DATAC |
| 48 | * space = 1: AX_INDXP, AX_DATAP |
| 49 | */ |
| 50 | void alink_ax_indx(u32 space, u32 axindc, u32 mask, u32 val) |
| 51 | { |
| 52 | u32 tmp; |
| 53 | |
| 54 | /* read axindc to tmp */ |
| 55 | outl(space << 30 | space << 3 | 0x30, AB_INDX); |
| 56 | outl(axindc, AB_DATA); |
| 57 | outl(space << 30 | space << 3 | 0x34, AB_INDX); |
| 58 | tmp = inl(AB_DATA); |
| 59 | |
| 60 | tmp &= ~mask; |
| 61 | tmp |= val; |
| 62 | |
| 63 | /* write tmp */ |
| 64 | outl(space << 30 | space << 3 | 0x30, AB_INDX); |
| 65 | outl(axindc, AB_DATA); |
| 66 | outl(space << 30 | space << 3 | 0x34, AB_INDX); |
| 67 | outl(tmp, AB_DATA); |
| 68 | } |
| 69 | |
Zheng Bao | eff2ffd | 2010-03-16 01:38:54 +0000 | [diff] [blame] | 70 | static int smbus_wait_until_ready(u32 smbus_io_base) |
| 71 | { |
| 72 | u32 loops; |
| 73 | loops = SMBUS_TIMEOUT; |
| 74 | do { |
| 75 | u8 val; |
| 76 | val = inb(smbus_io_base + SMBHSTSTAT); |
| 77 | val &= 0x1f; |
| 78 | if (val == 0) { /* ready now */ |
| 79 | return 0; |
| 80 | } |
| 81 | outb(val, smbus_io_base + SMBHSTSTAT); |
| 82 | } while (--loops); |
| 83 | return -2; /* time out */ |
| 84 | } |
| 85 | |
| 86 | static int smbus_wait_until_done(u32 smbus_io_base) |
| 87 | { |
| 88 | u32 loops; |
| 89 | loops = SMBUS_TIMEOUT; |
| 90 | do { |
| 91 | u8 val; |
| 92 | |
| 93 | val = inb(smbus_io_base + SMBHSTSTAT); |
| 94 | val &= 0x1f; /* mask off reserved bits */ |
| 95 | if (val & 0x1c) { |
| 96 | return -5; /* error */ |
| 97 | } |
| 98 | if (val == 0x02) { |
| 99 | outb(val, smbus_io_base + SMBHSTSTAT); /* clear status */ |
| 100 | return 0; |
| 101 | } |
| 102 | } while (--loops); |
| 103 | return -3; /* timeout */ |
| 104 | } |
| 105 | |
Stefan Reinauer | 5e33e82 | 2010-07-07 21:59:06 +0000 | [diff] [blame] | 106 | int do_smbus_recv_byte(u32 smbus_io_base, u32 device) |
Zheng Bao | eff2ffd | 2010-03-16 01:38:54 +0000 | [diff] [blame] | 107 | { |
| 108 | u8 byte; |
| 109 | |
| 110 | if (smbus_wait_until_ready(smbus_io_base) < 0) { |
| 111 | return -2; /* not ready */ |
| 112 | } |
| 113 | |
| 114 | /* set the device I'm talking too */ |
| 115 | outb(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHSTADDR); |
| 116 | |
| 117 | byte = inb(smbus_io_base + SMBHSTCTRL); |
| 118 | byte &= 0xe3; /* Clear [4:2] */ |
| 119 | byte |= (1 << 2) | (1 << 6); /* Byte data read/write command, start the command */ |
| 120 | outb(byte, smbus_io_base + SMBHSTCTRL); |
| 121 | |
| 122 | /* poll for transaction completion */ |
| 123 | if (smbus_wait_until_done(smbus_io_base) < 0) { |
| 124 | return -3; /* timeout or error */ |
| 125 | } |
| 126 | |
| 127 | /* read results of transaction */ |
| 128 | byte = inb(smbus_io_base + SMBHSTCMD); |
| 129 | |
| 130 | return byte; |
| 131 | } |
| 132 | |
Uwe Hermann | ff492b1 | 2010-09-24 23:37:25 +0000 | [diff] [blame] | 133 | int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val) |
Zheng Bao | eff2ffd | 2010-03-16 01:38:54 +0000 | [diff] [blame] | 134 | { |
| 135 | u8 byte; |
| 136 | |
| 137 | if (smbus_wait_until_ready(smbus_io_base) < 0) { |
| 138 | return -2; /* not ready */ |
| 139 | } |
| 140 | |
| 141 | /* set the command... */ |
| 142 | outb(val, smbus_io_base + SMBHSTCMD); |
| 143 | |
| 144 | /* set the device I'm talking too */ |
| 145 | outb(((device & 0x7f) << 1) | 0, smbus_io_base + SMBHSTADDR); |
| 146 | |
| 147 | byte = inb(smbus_io_base + SMBHSTCTRL); |
| 148 | byte &= 0xe3; /* Clear [4:2] */ |
| 149 | byte |= (1 << 2) | (1 << 6); /* Byte data read/write command, start the command */ |
| 150 | outb(byte, smbus_io_base + SMBHSTCTRL); |
| 151 | |
| 152 | /* poll for transaction completion */ |
| 153 | if (smbus_wait_until_done(smbus_io_base) < 0) { |
| 154 | return -3; /* timeout or error */ |
| 155 | } |
| 156 | |
| 157 | return 0; |
| 158 | } |
| 159 | |
Uwe Hermann | ff492b1 | 2010-09-24 23:37:25 +0000 | [diff] [blame] | 160 | int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address) |
Zheng Bao | eff2ffd | 2010-03-16 01:38:54 +0000 | [diff] [blame] | 161 | { |
| 162 | u8 byte; |
| 163 | |
| 164 | if (smbus_wait_until_ready(smbus_io_base) < 0) { |
| 165 | return -2; /* not ready */ |
| 166 | } |
| 167 | |
| 168 | /* set the command/address... */ |
| 169 | outb(address & 0xff, smbus_io_base + SMBHSTCMD); |
| 170 | |
| 171 | /* set the device I'm talking too */ |
| 172 | outb(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHSTADDR); |
| 173 | |
| 174 | byte = inb(smbus_io_base + SMBHSTCTRL); |
| 175 | byte &= 0xe3; /* Clear [4:2] */ |
| 176 | byte |= (1 << 3) | (1 << 6); /* Byte data read/write command, start the command */ |
| 177 | outb(byte, smbus_io_base + SMBHSTCTRL); |
| 178 | |
| 179 | /* poll for transaction completion */ |
| 180 | if (smbus_wait_until_done(smbus_io_base) < 0) { |
| 181 | return -3; /* timeout or error */ |
| 182 | } |
| 183 | |
| 184 | /* read results of transaction */ |
| 185 | byte = inb(smbus_io_base + SMBHSTDAT0); |
| 186 | |
| 187 | return byte; |
| 188 | } |
| 189 | |
Uwe Hermann | ff492b1 | 2010-09-24 23:37:25 +0000 | [diff] [blame] | 190 | int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val) |
Zheng Bao | eff2ffd | 2010-03-16 01:38:54 +0000 | [diff] [blame] | 191 | { |
| 192 | u8 byte; |
| 193 | |
| 194 | if (smbus_wait_until_ready(smbus_io_base) < 0) { |
| 195 | return -2; /* not ready */ |
| 196 | } |
| 197 | |
| 198 | /* set the command/address... */ |
| 199 | outb(address & 0xff, smbus_io_base + SMBHSTCMD); |
| 200 | |
| 201 | /* set the device I'm talking too */ |
| 202 | outb(((device & 0x7f) << 1) | 0, smbus_io_base + SMBHSTADDR); |
| 203 | |
| 204 | /* output value */ |
| 205 | outb(val, smbus_io_base + SMBHSTDAT0); |
| 206 | |
| 207 | byte = inb(smbus_io_base + SMBHSTCTRL); |
| 208 | byte &= 0xe3; /* Clear [4:2] */ |
| 209 | byte |= (1 << 3) | (1 << 6); /* Byte data read/write command, start the command */ |
| 210 | outb(byte, smbus_io_base + SMBHSTCTRL); |
| 211 | |
| 212 | /* poll for transaction completion */ |
| 213 | if (smbus_wait_until_done(smbus_io_base) < 0) { |
| 214 | return -3; /* timeout or error */ |
| 215 | } |
| 216 | |
| 217 | return 0; |
| 218 | } |
| 219 | |
Timothy Pearson | acbdade | 2015-10-17 04:36:47 -0500 | [diff] [blame] | 220 | void smbus_switch_to_channel(uint8_t channel_number) |
| 221 | { |
| 222 | amd_sb700_aux_smbus = !!channel_number; |
| 223 | } |
| 224 | |
| 225 | uint8_t smbus_get_current_channel(void) |
| 226 | { |
| 227 | return amd_sb700_aux_smbus; |
| 228 | } |
| 229 | |
Zheng Bao | eff2ffd | 2010-03-16 01:38:54 +0000 | [diff] [blame] | 230 | #endif |