huang lin | bfdd732 | 2014-09-25 16:33:38 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2014 Rockchip Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
huang lin | bfdd732 | 2014-09-25 16:33:38 +0800 | [diff] [blame] | 14 | */ |
| 15 | |
huang lin | bfdd732 | 2014-09-25 16:33:38 +0800 | [diff] [blame] | 16 | #include <arch/io.h> |
huang lin | bfdd732 | 2014-09-25 16:33:38 +0800 | [diff] [blame] | 17 | #include <assert.h> |
Julius Werner | 7a453eb | 2014-10-20 13:14:55 -0700 | [diff] [blame] | 18 | #include <console/console.h> |
huang lin | bfdd732 | 2014-09-25 16:33:38 +0800 | [diff] [blame] | 19 | #include <delay.h> |
Julius Werner | 7a453eb | 2014-10-20 13:14:55 -0700 | [diff] [blame] | 20 | #include <soc/addressmap.h> |
| 21 | #include <soc/grf.h> |
| 22 | #include <soc/soc.h> |
| 23 | #include <soc/pwm.h> |
| 24 | #include <soc/clock.h> |
| 25 | #include <stdlib.h> |
| 26 | #include <timer.h> |
huang lin | bfdd732 | 2014-09-25 16:33:38 +0800 | [diff] [blame] | 27 | |
| 28 | struct pwm_ctl { |
| 29 | u32 pwm_cnt; |
| 30 | u32 pwm_period_hpr; |
| 31 | u32 pwm_duty_lpr; |
| 32 | u32 pwm_ctrl; |
| 33 | }; |
| 34 | |
| 35 | struct rk3288_pwm_regs { |
| 36 | struct pwm_ctl pwm[4]; |
| 37 | u32 intsts; |
| 38 | u32 int_en; |
| 39 | }; |
| 40 | check_member(rk3288_pwm_regs, int_en, 0x44); |
| 41 | |
| 42 | #define RK_PWM_DISABLE (0 << 0) |
| 43 | #define RK_PWM_ENABLE (1 << 0) |
| 44 | |
| 45 | |
| 46 | #define PWM_ONE_SHOT (0 << 1) |
| 47 | #define PWM_CONTINUOUS (1 << 1) |
| 48 | #define RK_PWM_CAPTURE (1 << 2) |
| 49 | |
| 50 | #define PWM_DUTY_POSTIVE (1 << 3) |
| 51 | #define PWM_DUTY_NEGATIVE (0 << 3) |
| 52 | |
| 53 | #define PWM_INACTIVE_POSTIVE (1 << 4) |
| 54 | #define PWM_INACTIVE_NEGATIVE (0 << 4) |
| 55 | |
| 56 | #define PWM_OUTPUT_LEFT (0 << 5) |
| 57 | #define PWM_OUTPUT_CENTER (1 << 5) |
| 58 | |
| 59 | #define PWM_LP_ENABLE (1 << 8) |
| 60 | #define PWM_LP_DISABLE (0 << 8) |
| 61 | |
| 62 | #define PWM_SEL_SCALE_CLK (1 << 9) |
| 63 | #define PWM_SEL_SRC_CLK (0 << 9) |
| 64 | |
| 65 | struct rk3288_pwm_regs *rk3288_pwm = (void *)RK_PWM0123_BASE; |
| 66 | |
| 67 | void pwm_init(u32 id, u32 period_ns, u32 duty_ns) |
| 68 | { |
| 69 | unsigned long period, duty; |
| 70 | |
| 71 | /*use rk pwm*/ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 72 | write32(&rk3288_grf->soc_con2, RK_SETBITS(1 << 0)); |
huang lin | bfdd732 | 2014-09-25 16:33:38 +0800 | [diff] [blame] | 73 | |
Julius Werner | 9418476 | 2015-02-19 20:19:23 -0800 | [diff] [blame] | 74 | write32(&rk3288_pwm->pwm[id].pwm_ctrl, PWM_SEL_SRC_CLK | |
| 75 | PWM_OUTPUT_LEFT | PWM_LP_DISABLE | PWM_CONTINUOUS | |
| 76 | PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE | RK_PWM_DISABLE); |
huang lin | bfdd732 | 2014-09-25 16:33:38 +0800 | [diff] [blame] | 77 | |
| 78 | period = (PD_BUS_PCLK_HZ / 1000) * period_ns / USECS_PER_SEC; |
| 79 | duty = (PD_BUS_PCLK_HZ / 1000) * duty_ns / USECS_PER_SEC; |
| 80 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 81 | write32(&rk3288_pwm->pwm[id].pwm_period_hpr, period); |
| 82 | write32(&rk3288_pwm->pwm[id].pwm_duty_lpr, duty); |
huang lin | bfdd732 | 2014-09-25 16:33:38 +0800 | [diff] [blame] | 83 | setbits_le32(&rk3288_pwm->pwm[id].pwm_ctrl, RK_PWM_ENABLE); |
| 84 | } |