Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2013 Google Inc. |
| 5 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <arch/io.h> |
| 18 | #include <console/console.h> |
| 19 | #include <soc/addressmap.h> |
Jimmy Zhang | b365530 | 2014-07-02 17:45:18 -0700 | [diff] [blame] | 20 | #include <soc/clock.h> |
Julius Werner | f0d21ff3 | 2014-10-20 13:24:14 -0700 | [diff] [blame] | 21 | #include <soc/flow.h> |
| 22 | #include <soc/pmc.h> |
| 23 | #include <soc/power.h> |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 24 | |
| 25 | static struct tegra_pmc_regs * const pmc = (void *)TEGRA_PMC_BASE; |
Yen Lin | 5840626 | 2014-07-10 11:46:10 -0700 | [diff] [blame] | 26 | static struct flow_ctlr * const flow = (void *)TEGRA_FLOW_BASE; |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 27 | |
| 28 | static int partition_powered(int id) |
| 29 | { |
| 30 | return read32(&pmc->pwrgate_status) & (0x1 << id); |
| 31 | } |
| 32 | |
Jimmy Zhang | b365530 | 2014-07-02 17:45:18 -0700 | [diff] [blame] | 33 | static int partition_clamp_on(int id) |
| 34 | { |
| 35 | return read32(&pmc->clamp_status) & (0x1 << id); |
| 36 | } |
| 37 | |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 38 | static void power_ungate_partition(uint32_t id) |
| 39 | { |
| 40 | printk(BIOS_INFO, "Ungating power partition %d.\n", id); |
| 41 | |
| 42 | if (!partition_powered(id)) { |
| 43 | uint32_t pwrgate_toggle = read32(&pmc->pwrgate_toggle); |
| 44 | pwrgate_toggle &= ~(PMC_PWRGATE_TOGGLE_PARTID_MASK); |
| 45 | pwrgate_toggle |= (id << PMC_PWRGATE_TOGGLE_PARTID_SHIFT); |
| 46 | pwrgate_toggle |= PMC_PWRGATE_TOGGLE_START; |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 47 | write32(&pmc->pwrgate_toggle, pwrgate_toggle); |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 48 | |
| 49 | // Wait for the request to be accepted. |
| 50 | while (read32(&pmc->pwrgate_toggle) & PMC_PWRGATE_TOGGLE_START) |
| 51 | ; |
| 52 | printk(BIOS_DEBUG, "Power gate toggle request accepted.\n"); |
| 53 | |
| 54 | // Wait for the partition to be powered. |
| 55 | while (!partition_powered(id)) |
| 56 | ; |
Jimmy Zhang | b365530 | 2014-07-02 17:45:18 -0700 | [diff] [blame] | 57 | |
| 58 | // Wait for clamp off. |
| 59 | while (partition_clamp_on(id)) |
| 60 | ; |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 61 | } |
| 62 | |
| 63 | printk(BIOS_INFO, "Ungated power partition %d.\n", id); |
| 64 | } |
| 65 | |
Jimmy Zhang | b365530 | 2014-07-02 17:45:18 -0700 | [diff] [blame] | 66 | void power_enable_and_ungate_cpu(void) |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 67 | { |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 68 | /* |
Jimmy Zhang | b365530 | 2014-07-02 17:45:18 -0700 | [diff] [blame] | 69 | * Set CPUPWRGOOD_TIMER - APB clock is 1/2 of SCLK (150MHz), |
| 70 | * set it for 5ms as per SysEng (5ms * PCLK_KHZ * 1000 / 1s). |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 71 | */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 72 | write32(&pmc->cpupwrgood_timer, (TEGRA_PCLK_KHZ * 5)); |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 73 | |
| 74 | uint32_t cntrl = read32(&pmc->cntrl); |
| 75 | cntrl &= ~PMC_CNTRL_CPUPWRREQ_POLARITY; |
| 76 | cntrl |= PMC_CNTRL_CPUPWRREQ_OE; |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 77 | write32(&pmc->cntrl, cntrl); |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 78 | |
Jimmy Zhang | b365530 | 2014-07-02 17:45:18 -0700 | [diff] [blame] | 79 | power_ungate_partition(POWER_PARTID_CRAIL); |
| 80 | |
Gabe Black | d40be11 | 2013-10-09 23:45:07 -0700 | [diff] [blame] | 81 | // Ungate power to the non-core parts of the fast cluster. |
| 82 | power_ungate_partition(POWER_PARTID_C0NC); |
| 83 | |
| 84 | // Ungate power to CPU0 in the fast cluster. |
| 85 | power_ungate_partition(POWER_PARTID_CE0); |
| 86 | } |
Gabe Black | 4dc3e28 | 2014-05-06 15:33:37 -0700 | [diff] [blame] | 87 | |
| 88 | int power_reset_status(void) |
| 89 | { |
| 90 | return read32(&pmc->rst_status) & 0x7; |
| 91 | } |
Yen Lin | 5840626 | 2014-07-10 11:46:10 -0700 | [diff] [blame] | 92 | |
| 93 | void ram_repair(void) |
| 94 | { |
| 95 | // Request RAM repair for cluster 0 |
| 96 | setbits_le32(&flow->ram_repair, RAM_REPAIR_REQ); |
| 97 | // Poll for completion |
| 98 | while (!(read32(&flow->ram_repair) & RAM_REPAIR_STS)) |
| 99 | ; |
| 100 | // Request RAM repair for cluster 1 |
| 101 | setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ); |
| 102 | // Poll for completion |
| 103 | while (!(read32(&flow->ram_repair_cluster1) & RAM_REPAIR_STS)) |
| 104 | ; |
| 105 | } |