Daisuke Nojiri | 1b05d88 | 2014-08-27 11:48:03 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2014 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Daisuke Nojiri | 1b05d88 | 2014-08-27 11:48:03 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
Julius Werner | eaa9c45 | 2014-09-24 15:40:49 -0700 | [diff] [blame] | 16 | #include <gpio.h> |
Daisuke Nojiri | 1b05d88 | 2014-08-27 11:48:03 -0700 | [diff] [blame] | 17 | #include <soc/addressmap.h> |
| 18 | #include <soc/clock.h> |
Julius Werner | f0d21ff3 | 2014-10-20 13:24:14 -0700 | [diff] [blame] | 19 | #include <soc/early_configs.h> |
Daisuke Nojiri | 1b05d88 | 2014-08-27 11:48:03 -0700 | [diff] [blame] | 20 | #include <soc/nvidia/tegra/i2c.h> |
Daisuke Nojiri | 1b05d88 | 2014-08-27 11:48:03 -0700 | [diff] [blame] | 21 | |
| 22 | static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE; |
| 23 | |
| 24 | static void setup_pinmux(void) |
| 25 | { |
| 26 | /* Write protect. */ |
| 27 | gpio_input_pullup(GPIO(R1)); |
| 28 | /* Recovery mode. */ |
| 29 | gpio_input_pullup(GPIO(Q7)); |
| 30 | /* Lid switch. */ |
| 31 | gpio_input_pullup(GPIO(R4)); |
| 32 | /* Power switch. */ |
| 33 | gpio_input_pullup(GPIO(Q0)); |
| 34 | /* Developer mode. */ |
| 35 | gpio_input_pullup(GPIO(Q6)); |
| 36 | /* EC in RW. */ |
| 37 | gpio_input_pullup(GPIO(U4)); |
| 38 | |
| 39 | /* route PU4/5 to GMI to remove conflict w/PWM1/2. */ |
| 40 | pinmux_set_config(PINMUX_GPIO_PU4_INDEX, |
| 41 | PINMUX_GPIO_PU4_FUNC_NOR); /* s/b GMI */ |
| 42 | pinmux_set_config(PINMUX_GPIO_PU5_INDEX, |
| 43 | PINMUX_GPIO_PU5_FUNC_NOR); /* s/b GMI */ |
| 44 | |
| 45 | /* SOC and TPM reset GPIO, active low. */ |
| 46 | gpio_output(GPIO(I5), 1); |
| 47 | |
| 48 | /* SPI1 MOSI */ |
| 49 | pinmux_set_config(PINMUX_ULPI_CLK_INDEX, PINMUX_ULPI_CLK_FUNC_SPI1 | |
| 50 | PINMUX_PULL_NONE | |
| 51 | PINMUX_INPUT_ENABLE); |
| 52 | /* SPI1 MISO */ |
| 53 | pinmux_set_config(PINMUX_ULPI_DIR_INDEX, PINMUX_ULPI_DIR_FUNC_SPI1 | |
| 54 | PINMUX_PULL_NONE | |
| 55 | PINMUX_INPUT_ENABLE); |
| 56 | /* SPI1 SCLK */ |
| 57 | pinmux_set_config(PINMUX_ULPI_NXT_INDEX, PINMUX_ULPI_NXT_FUNC_SPI1 | |
| 58 | PINMUX_PULL_NONE | |
| 59 | PINMUX_INPUT_ENABLE); |
| 60 | /* SPI1 CS0 */ |
| 61 | pinmux_set_config(PINMUX_ULPI_STP_INDEX, PINMUX_ULPI_STP_FUNC_SPI1 | |
| 62 | PINMUX_PULL_NONE | |
| 63 | PINMUX_INPUT_ENABLE); |
| 64 | |
| 65 | /* I2C3 (cam) clock. */ |
| 66 | pinmux_set_config(PINMUX_CAM_I2C_SCL_INDEX, |
| 67 | PINMUX_CAM_I2C_SCL_FUNC_I2C3 | PINMUX_INPUT_ENABLE); |
| 68 | /* I2C3 (cam) data. */ |
| 69 | pinmux_set_config(PINMUX_CAM_I2C_SDA_INDEX, |
| 70 | PINMUX_CAM_I2C_SDA_FUNC_I2C3 | PINMUX_INPUT_ENABLE); |
| 71 | |
| 72 | /* switch unused pin to GPIO */ |
| 73 | gpio_set_mode(GPIO(X3), GPIO_MODE_GPIO); |
| 74 | gpio_set_mode(GPIO(X4), GPIO_MODE_GPIO); |
| 75 | gpio_set_mode(GPIO(X5), GPIO_MODE_GPIO); |
| 76 | gpio_set_mode(GPIO(X6), GPIO_MODE_GPIO); |
| 77 | gpio_set_mode(GPIO(X7), GPIO_MODE_GPIO); |
| 78 | gpio_set_mode(GPIO(W3), GPIO_MODE_GPIO); |
| 79 | } |
| 80 | |
| 81 | static void configure_ec_spi_bus(void) |
| 82 | { |
| 83 | clock_configure_source(sbc1, CLK_M, 3000); |
| 84 | } |
| 85 | |
| 86 | static void configure_tpm_i2c_bus(void) |
| 87 | { |
| 88 | clock_configure_i2c_scl_freq(i2c3, PLLP, 400); |
| 89 | |
| 90 | i2c_init(2); |
| 91 | } |
| 92 | |
| 93 | void early_mainboard_init(void) |
| 94 | { |
| 95 | clock_enable_clear_reset(0, CLK_H_SBC1, CLK_U_I2C3, 0, 0, 0); |
| 96 | setup_pinmux(); |
| 97 | configure_ec_spi_bus(); |
| 98 | configure_tpm_i2c_bus(); |
| 99 | } |