Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2014 Google Inc. |
| 5 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 15 | */ |
| 16 | |
Julius Werner | f0d21ff3 | 2014-10-20 13:24:14 -0700 | [diff] [blame] | 17 | #include <boardid.h> |
Tom Warren | bb932c5 | 2014-04-30 14:51:38 -0700 | [diff] [blame] | 18 | #include <console/console.h> |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 19 | #include <delay.h> |
| 20 | #include <device/i2c.h> |
| 21 | #include <stdint.h> |
| 22 | #include <stdlib.h> |
Daisuke Nojiri | 512bfbc | 2014-08-15 17:07:39 -0700 | [diff] [blame] | 23 | #include <reset.h> |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 24 | |
Julius Werner | f0d21ff3 | 2014-10-20 13:24:14 -0700 | [diff] [blame] | 25 | #include "pmic.h" |
| 26 | |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 27 | enum { |
| 28 | AS3722_I2C_ADDR = 0x40 |
| 29 | }; |
| 30 | |
| 31 | struct as3722_init_reg { |
| 32 | u8 reg; |
| 33 | u8 val; |
Gabe Black | 1f4e283 | 2014-03-05 22:24:54 -0800 | [diff] [blame] | 34 | u8 delay; |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 35 | }; |
| 36 | |
| 37 | static struct as3722_init_reg init_list[] = { |
Gabe Black | 1f4e283 | 2014-03-05 22:24:54 -0800 | [diff] [blame] | 38 | {AS3722_SDO0, 0x3C, 1}, |
| 39 | {AS3722_SDO1, 0x32, 0}, |
| 40 | {AS3722_LDO3, 0x59, 0}, |
| 41 | {AS3722_SDO2, 0x3C, 0}, |
| 42 | {AS3722_SDO3, 0x00, 0}, |
| 43 | {AS3722_SDO4, 0x00, 0}, |
| 44 | {AS3722_SDO5, 0x50, 0}, |
| 45 | {AS3722_SDO6, 0x28, 1}, |
| 46 | {AS3722_LDO0, 0x8A, 0}, |
| 47 | {AS3722_LDO1, 0x00, 0}, |
| 48 | {AS3722_LDO2, 0x10, 0}, |
| 49 | {AS3722_LDO4, 0x00, 0}, |
| 50 | {AS3722_LDO5, 0x00, 0}, |
Hung-Te Lin | 86bd91a | 2014-04-25 08:21:24 +0800 | [diff] [blame] | 51 | {AS3722_LDO6, 0x00, 0}, |
Gabe Black | 1f4e283 | 2014-03-05 22:24:54 -0800 | [diff] [blame] | 52 | {AS3722_LDO7, 0x00, 0}, |
| 53 | {AS3722_LDO9, 0x00, 0}, |
| 54 | {AS3722_LDO10, 0x00, 0}, |
| 55 | {AS3722_LDO11, 0x00, 1}, |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 56 | }; |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 57 | |
Gabe Black | 1f4e283 | 2014-03-05 22:24:54 -0800 | [diff] [blame] | 58 | static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay) |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 59 | { |
Tom Warren | bb932c5 | 2014-04-30 14:51:38 -0700 | [diff] [blame] | 60 | if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) { |
| 61 | printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", |
| 62 | __func__, reg, val); |
| 63 | /* Reset the SoC on any PMIC write error */ |
Daisuke Nojiri | 512bfbc | 2014-08-15 17:07:39 -0700 | [diff] [blame] | 64 | hard_reset(); |
Tom Warren | bb932c5 | 2014-04-30 14:51:38 -0700 | [diff] [blame] | 65 | } else { |
| 66 | if (do_delay) |
| 67 | udelay(500); |
| 68 | } |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 69 | } |
| 70 | |
| 71 | static void pmic_slam_defaults(unsigned bus) |
| 72 | { |
| 73 | int i; |
| 74 | |
Gabe Black | 1f4e283 | 2014-03-05 22:24:54 -0800 | [diff] [blame] | 75 | for (i = 0; i < ARRAY_SIZE(init_list); i++) { |
| 76 | struct as3722_init_reg *reg = &init_list[i]; |
| 77 | pmic_write_reg(bus, reg->reg, reg->val, reg->delay); |
| 78 | } |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 79 | } |
| 80 | |
| 81 | void pmic_init(unsigned bus) |
| 82 | { |
| 83 | /* |
| 84 | * Don't need to set up VDD_CORE - already done - by OTP |
| 85 | * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. |
| 86 | * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. |
| 87 | */ |
| 88 | |
| 89 | /* Restore PMIC POR defaults, in case kernel changed 'em */ |
| 90 | pmic_slam_defaults(bus); |
| 91 | |
| 92 | /* First set VDD_CPU to 1.2V, then enable the VDD_CPU regulator. */ |
Gabe Black | 1f4e283 | 2014-03-05 22:24:54 -0800 | [diff] [blame] | 93 | pmic_write_reg(bus, 0x00, 0x50, 1); |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 94 | |
| 95 | /* First set VDD_GPU to 1.0V, then enable the VDD_GPU regulator. */ |
Gabe Black | 1f4e283 | 2014-03-05 22:24:54 -0800 | [diff] [blame] | 96 | pmic_write_reg(bus, 0x06, 0x28, 1); |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 97 | |
Gabe Black | 1f4e283 | 2014-03-05 22:24:54 -0800 | [diff] [blame] | 98 | /* |
| 99 | * First set +1.2V_GEN_AVDD to 1.2V, then enable the +1.2V_GEN_AVDD |
| 100 | * regulator. |
| 101 | */ |
| 102 | pmic_write_reg(bus, 0x12, 0x10, 1); |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 103 | |
| 104 | /* |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 105 | * Panel power GPIO O4. Set mode for GPIO4 (0x0c to 7), then set |
| 106 | * the value (register 0x20 bit 4) |
| 107 | */ |
Gabe Black | 1f4e283 | 2014-03-05 22:24:54 -0800 | [diff] [blame] | 108 | pmic_write_reg(bus, 0x0c, 0x07, 0); |
| 109 | pmic_write_reg(bus, 0x20, 0x10, 1); |
Gabe Black | 5c8d3d2 | 2014-01-17 22:11:35 -0800 | [diff] [blame] | 110 | } |