Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 16 | #include <stdint.h> |
Patrick Georgi | 12aba82 | 2009-04-30 07:07:22 +0000 | [diff] [blame] | 17 | #include <string.h> |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 18 | #include <device/pci_def.h> |
| 19 | #include <arch/io.h> |
| 20 | #include <device/pnp_def.h> |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 21 | #include <cpu/x86/lapic.h> |
Edwin Beasant | eb50c7d | 2010-07-06 21:05:04 +0000 | [diff] [blame] | 22 | #include <pc80/mc146818rtc.h> |
Patrick Georgi | 12584e2 | 2010-05-08 09:14:51 +0000 | [diff] [blame] | 23 | #include <console/console.h> |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 24 | #include <cpu/amd/model_fxx_rev.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 25 | #include <northbridge/amd/amdk8/raminit.h> |
Edward O'Callaghan | ebe3a7a | 2015-01-05 00:27:54 +1100 | [diff] [blame] | 26 | #include <delay.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 27 | #include <cpu/x86/lapic.h> |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 28 | #include "northbridge/amd/amdk8/reset_test.c" |
Patrick Georgi | 9bd9a90 | 2010-11-20 10:31:00 +0000 | [diff] [blame] | 29 | #include <spd.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 30 | #include <cpu/x86/bist.h> |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 31 | #include "northbridge/amd/amdk8/setup_resource_map.c" |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 32 | #include "southbridge/amd/rs690/early_setup.c" |
| 33 | #include "southbridge/amd/sb600/early_setup.c" |
| 34 | #include "northbridge/amd/amdk8/debug.c" /* After sb600/early_setup.c! */ |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 35 | |
Uwe Hermann | 7b99705 | 2010-11-21 22:47:22 +0000 | [diff] [blame] | 36 | static void memreset(int controllers, const struct mem_controller *ctrl) { } |
| 37 | static void activate_spd_rom(const struct mem_controller *ctrl) { } |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 38 | |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 39 | static inline int spd_read_byte(u32 device, u32 address) |
| 40 | { |
| 41 | return smbus_read_byte(device, address); |
| 42 | } |
| 43 | |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 44 | #include <northbridge/amd/amdk8/amdk8.h> |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 45 | #include "northbridge/amd/amdk8/incoherent_ht.c" |
Myles Watson | 1725703 | 2009-06-04 20:18:42 +0000 | [diff] [blame] | 46 | #include "northbridge/amd/amdk8/raminit_f.c" |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 47 | #include "northbridge/amd/amdk8/coherent_ht.c" |
Stefan Reinauer | c13093b | 2009-09-23 18:51:03 +0000 | [diff] [blame] | 48 | #include "lib/generic_sdram.c" |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 49 | #include "resourcemap.c" |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 50 | #include "cpu/amd/dualcore/dualcore.c" |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 51 | #include "cpu/amd/model_fxx/init_cpus.c" |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 52 | #include "cpu/amd/model_fxx/fidvid.c" |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 53 | #include "northbridge/amd/amdk8/early_ht.c" |
| 54 | |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 55 | void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |
| 56 | { |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 57 | static const u16 spd_addr[] = { DIMM0, 0, 0, 0, DIMM1, 0, 0, 0, }; |
| 58 | int needs_reset = 0; |
| 59 | u32 bsp_apicid = 0; |
| 60 | msr_t msr; |
Dan Lykowski | 6ef8e0f | 2009-01-12 16:16:08 +0000 | [diff] [blame] | 61 | struct cpuid_result cpuid1; |
Patrick Georgi | bbc880e | 2012-11-20 18:20:56 +0100 | [diff] [blame] | 62 | struct sys_info *sysinfo = &sysinfo_car; |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 63 | |
Patrick Georgi | 2bd9100 | 2010-03-18 16:46:50 +0000 | [diff] [blame] | 64 | if (!cpu_init_detectedx && boot_cpu()) { |
Patrick Georgi | 776b85b | 2010-03-18 16:18:58 +0000 | [diff] [blame] | 65 | /* Nothing special needs to be done to find bus 0 */ |
| 66 | /* Allow the HT devices to be found */ |
| 67 | enumerate_ht_chain(); |
Patrick Georgi | 776b85b | 2010-03-18 16:18:58 +0000 | [diff] [blame] | 68 | sb600_lpc_port80(); |
| 69 | /* sb600_pci_port80(); */ |
| 70 | } |
| 71 | |
Uwe Hermann | 7b99705 | 2010-11-21 22:47:22 +0000 | [diff] [blame] | 72 | if (bist == 0) |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 73 | bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 74 | |
| 75 | enable_rs690_dev8(); |
| 76 | sb600_lpc_init(); |
| 77 | |
| 78 | /* Pistachio used a FPGA to enable serial debug instead of a SIO |
Uwe Hermann | b015d02 | 2010-09-24 18:18:20 +0000 | [diff] [blame] | 79 | * and it doesn't require any special setup. */ |
Uwe Hermann | b015d02 | 2010-09-24 18:18:20 +0000 | [diff] [blame] | 80 | |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 81 | console_init(); |
| 82 | |
| 83 | post_code(0x03); |
| 84 | |
| 85 | /* Halt if there was a built in self test failure */ |
| 86 | report_bist_failure(bist); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 87 | printk(BIOS_DEBUG, "bsp_apicid=0x%x\n", bsp_apicid); |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 88 | |
| 89 | setup_pistachio_resource_map(); |
| 90 | |
| 91 | setup_coherent_ht_domain(); |
| 92 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 93 | #if CONFIG_LOGICAL_CPUS |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 94 | /* It is said that we should start core1 after all core0 launched */ |
| 95 | wait_all_core0_started(); |
| 96 | start_other_cores(); |
| 97 | #endif |
| 98 | wait_all_aps_started(bsp_apicid); |
| 99 | |
| 100 | /* it will set up chains and store link pair for optimization later, |
| 101 | * it will init sblnk and sbbusn, nodes, sbdn */ |
| 102 | ht_setup_chains_x(sysinfo); |
| 103 | |
| 104 | /* run _early_setup before soft-reset. */ |
| 105 | rs690_early_setup(); |
| 106 | sb600_early_setup(); |
| 107 | |
| 108 | post_code(0x04); |
| 109 | |
Dan Lykowski | 6ef8e0f | 2009-01-12 16:16:08 +0000 | [diff] [blame] | 110 | /* Check to see if processor is capable of changing FIDVID */ |
| 111 | /* otherwise it will throw a GP# when reading FIDVID_STATUS */ |
| 112 | cpuid1 = cpuid(0x80000007); |
Uwe Hermann | 7b99705 | 2010-11-21 22:47:22 +0000 | [diff] [blame] | 113 | if ((cpuid1.edx & 0x6) == 0x6) { |
Dan Lykowski | 6ef8e0f | 2009-01-12 16:16:08 +0000 | [diff] [blame] | 114 | /* Read FIDVID_STATUS */ |
| 115 | msr=rdmsr(0xc0010042); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 116 | printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 117 | |
Dan Lykowski | 6ef8e0f | 2009-01-12 16:16:08 +0000 | [diff] [blame] | 118 | enable_fid_change(); |
| 119 | enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); |
| 120 | init_fidvid_bsp(bsp_apicid); |
| 121 | |
| 122 | /* show final fid and vid */ |
| 123 | msr=rdmsr(0xc0010042); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 124 | printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); |
Dan Lykowski | 6ef8e0f | 2009-01-12 16:16:08 +0000 | [diff] [blame] | 125 | } else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 126 | printk(BIOS_DEBUG, "Changing FIDVID not supported\n"); |
Dan Lykowski | 6ef8e0f | 2009-01-12 16:16:08 +0000 | [diff] [blame] | 127 | } |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 128 | |
| 129 | post_code(0x05); |
| 130 | |
| 131 | needs_reset = optimize_link_coherent_ht(); |
| 132 | needs_reset |= optimize_link_incoherent_ht(sysinfo); |
Carl-Daniel Hailfinger | 33f9633 | 2008-12-23 17:20:46 +0000 | [diff] [blame] | 133 | rs690_htinit(); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 134 | printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset); |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 135 | |
| 136 | post_code(0x06); |
| 137 | |
| 138 | if (needs_reset) { |
Stefan Reinauer | 069f476 | 2015-01-05 13:02:32 -0800 | [diff] [blame] | 139 | printk(BIOS_INFO, "ht reset -\n"); |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 140 | soft_reset(); |
| 141 | } |
| 142 | |
| 143 | allow_all_aps_stop(bsp_apicid); |
| 144 | |
| 145 | /* It's the time to set ctrl now; */ |
Myles Watson | 08e0fb8 | 2010-03-22 16:33:25 +0000 | [diff] [blame] | 146 | printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %p spd_addr: %p\n", |
Maggie Li | 19ead96 | 2008-12-09 21:52:42 +0000 | [diff] [blame] | 147 | sysinfo->nodes, sysinfo->ctrl, spd_addr); |
| 148 | fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); |
| 149 | |
| 150 | post_code(0x07); |
| 151 | |
| 152 | sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); |
| 153 | |
| 154 | post_code(0x08); |
| 155 | |
| 156 | rs690_before_pci_init(); |
| 157 | sb600_before_pci_init(); |
| 158 | |
| 159 | post_cache_as_ram(); |
| 160 | } |